Error propagation analysis using FPGA-based SEU-fault injection

Error propagation analysis is one of the main objectives of fault injection experiments. This analysis helps designers to detect design mistakes and to provide effective mechanisms for fault tolerant systems. However, error propagation analysis requires that the chosen fault injection technique provides a high degree of observability (i.e., the ability to observe the internal values and events of a circuit after a fault is injected). Simulation-based fault injection provides a high observability adequate for error propagation analysis. However, the performance of the simulation-based technique is inadequate to handle today’s hardware complexity. As an alternative, FPGA-based fault injection can be used to accelerate the fault injection experiments, but the communication time needed for observing the circuit behavior from outside of the FPGA imposes severe limitations on the observability. In this paper, an observation technique for FPGA-based fault injection is proposed which significantly reduces the communication time as compared with previous scan-based observation techniques. Furthermore, this paper describes a SEU-fault injection technique based on a chain of parallel registers which reduces the time needed for injecting SEU faults as compared to the previous scan-based fault-injection techniques. As a case study, a 32-bit pipelined processor has been used in the fault injection experiments. The experimental results show that when a high degree of observability is required (e.g., error propagation analysis), the proposed fault injection technique is over 1166 times faster than simulation-based fault injection, whereas the traditional scan-based technique can achieve only a speedup of about 2–3 – which means that the proposed technique is about 500 times faster than the traditional scan-based technique. Such results are supported by theoretical performance analysis. This speed increase has been achieved without excessive increase in FPGA resource overhead, for example, the FPGA overhead of the proposed technique is only 2  3% higher than that of the traditional scan-based technique.     

Design of high-speed two-stage cascode-compensated operational amplifiers based on settling time and open-loop parameters

Settling behavior of operational amplifiers is of great importance in many applications. In this paper, an efficient methodology for the design of high-speed two-stage operational amplifiers based on settling time is proposed. Concerning the application of the operational amplifier, it specifies proper open-loop circuit parameters to obtain the desired settling time and closed-loop stability. As the effect of transfer function zeros has been taken into account, the proposed methodology becomes more accurate in achieving the desired specifications. Simulation results are presented to show the effectiveness of the methodology.     

SD‐WLB: An SDN‐aided mechanism for web load balancing based on server statistics

Software‐defined networking (SDN) is a modern approach for current computer and data networks. The increase in the number of business websites has resulted in an exponential growth in web traffic. To cope with the increased demands, multiple web servers with a front‐end load balancer are widely used by organizations and businesses as a viable solution to improve the performance. In this paper, we propose a load‐balancing mechanism for SDN. Our approach allocates web requests to each server according to its response time and the traffic volume of the corresponding switch port. The centralized SDN controller periodically collects this information to maintain an up‐to‐date view of the load distribution among the servers, and incoming user requests are redirected to the most appropriate server. The simulation results confirm the superiority of our approach compared to several other techniques. Compared to LBBSRT, round robin, and random selection methods, our mechanism improves the average response time by 19.58%, 33.94%, and 57.41%, respectively. Furthermore, the average improvement of throughput in comparison with these algorithms is 16.52%, 29.72%, and 58.27%, respectively.     

Telesurgery QoS improvement over SDN based on a Type‐2 fuzzy system and enhanced cuckoo optimization algorithm

Telemedicine is a new area based on the information and communication technology for collecting, storing, organizing, retrieving and exchanging medical information. One of the most important applications of telemedicine is indeed telesurgery in which an efficient telecommunication infrastructure between the surgery room and remote surgeons need to be established. One of the most important issues to be tackled in telesurgery is to find favorable links for routing as well as providing high Quality of Service (QoS). In this paper, an efficient model based on the hybridization of Type‐2 Fuzzy System (T2FS) and Cuckoo Optimization Algorithm (COA) over the Software Defined Networks (SDN) is proposed in order to achieve optimal and reliable routes for telesurgery application. Using T2FS, the fitness of the links is determined; then, a COA is conducted over the Constraint Shortest Path (CSP) problem to find the best routes. Delay is considered as a CSP problem which is satisfied by trying to find the paths with minimum cost. Due to the NP‐completeness of the CSP problem, an Enhanced COA (so‐called E‐COA) is proposed and utilized as a metaheuristic solver. To the best of our knowledge, this paper is the first SDN‐based communication model that applies both T2FS and E‐COA for assigning proper costs to the network's links, and solves the consequence CSP problem according to the QoS requirement for telesurgery. The model also recognizes and preserves the second‐best routes in order to keep the reliability for such a critical application. In addition to the simulations, the performance evaluation is also conducted on a real experimental scenario. Many comparisons are carried out between the proposed model and other conventional methods, and the evaluation study shows the superiority of the proposed model on all the three QoS‐related metrics, i.e. average end‐to‐end delay, packet loss ratio and PSNR.     

Synergistic Roll‐to‐Roll Transfer and Doping of CVD‐Graphene Using Parylene for Ambient‐Stable and Ultra‐Lightweight Photovoltaics

A roll‐to‐roll (R2R) transfer technique is employed to improve the electrical properties of transferred graphene on flexible substrates using parylene as an interfacial layer. A layer of parylene is deposited on graphene/copper (Cu) foils grown by chemical vapor deposition and are laminated onto ethylene vinyl acetate (EVA)/poly(ethylene terephthalate). Then, the samples are delaminated from the Cu using an electrochemical transfer process, resulting in flexible and conductive substrates with sheet resistances of below 300 Ω sq^?1, which is significantly better (fourfold) than the sample transferred by R2R without parylene (1200 Ω sq^?1). The characterization results indicate that parylene C and D dope graphene due to the presence of chlorine atoms in their structure, resulting in higher carrier density and thus lower sheet resistance. Density functional theory calculations reveal that the binding energy between parylene and graphene is stronger than that of EVA and graphene, which may lead to less tear in graphene during the R2R transfer. Finally, organic solar cells are fabricated on the ultrathin and flexible parylene/graphene substrates and an ultra‐lightweight device is achieved with a power conversion efficiency of 5.86%. Additionally, the device shows a high power per weight of 6.46 W g^?1 with superior air stability.     

A New Criteria Decision Applied on the Primary Synchronization in the DS-WCDMA Interface of the UMTS System

In DS-WCDMA mobile systems such the UMTS, asynchronous cell site operation,assigning different long spreading code to each cell, yields the advantageof flexible system deployment. We can design an indoor system basedon an outdoor one. However, in general, much longer search time isrequired in asynchronous operation than in synchronous. This paperproposes three techniques to take decisions about synchronizationbased on observation of correlated signals. Classical decision criterialike maximum and threshold criterion are presented. A new decisioncriteria that we call Threshold&Max combined decision criteriais analyzed. The results of this new introduced technique is comparedwith the classical ones.     

A Novel UWB Pulse Shape Modulation System

In this paper novel modified Hermite polynomial functions for use in impulse radio (ultra-wideband) communications are proposed. With these functions pulse shapes which are orthogonal and have nearly constant pulse width regardless of the pulse order are generated. These properties hold under the effects of differentiation. An M-ary communication system is constructed using these pulse shapes. A Matlab model for generating the pulses is designed and the effect of timing jitter on the performance of the system is investigated by computer simulation.     

ADYTIA: Adaptive and Dynamic TCP Interface Architecture for heterogeneous networks

Due to the widespread popularity and usage of Internet of things (IoT)‐enabled devices, there is an exponential increase in the data traffic generated from these IoT devices. Most of these devices communicate with each other using heterogeneous links having constraints such as latency, throughput, and interference from concurrent transmissions. This results in an extra burden on the underlying communication infrastructure to manage the traffic within these constraints between source and destination. However, most of the existing applications use different Transmission Control Protocol (TCP) variants for traffic management between these devices and are dependent on the stage of the sender, irrespective of the application types and link characteristics. Each operating system (OS) has different TCP variant for all applications, irrespective of path characteristics. Hence, a single TCP variant cannot select the best suitable link, which results in degradation in throughput compared to the existing default. Moreover, it cannot use the full capacity of the available link for different applications and network links, especially in heterogeneous network such as IoT. To cope up with these challenges, in this paper, we propose an Adaptive and Dynamic TCP Interface Architecture (ADYTIA). ADYTIA allows the usage of different TCP variants based on application and link characteristics, irrespective of the physical links of the entire path. It allows the usage of different TCP variants based on their design principle across heterogeneous technologies, platforms, and applications. ADYTIA is implemented on NS‐2 and Linux kernel for real testbed experiments. Its ability to select the best suitable TCP variant results in 20% to 80% improvement in throughput compared with the existing default and single TCP variant on Linux and Windows.     

A time-domain noise-coupling technique for continuous-time sigma-delta modulators

In this paper, a time-domain noise-coupling technique based on the pulse width modulation is proposed. The time-domain quantization error is digitally extracted and shaped by an asynchronous digital filter. This digitally filtered quantization error is applied to the quantizer input to increase the modulator’s noise-shaping order. By using this technique in continuous-time sigma-delta modulators, the modulator’s shaping property is significantly enhanced. Comparative analytical calculations and simulation results are presented to estimate the performance of modulators employing the proposed quantizer. System-level simulation results reveal a (L + 2)th order noise-shaping capability of the proposed modulator while it employs only L analog integrators. The effects of main circuit non-idealities in the modulator’s performance are analytically investigated and confirmed by the simulation results.