DC and AC characteristics of sub-50-nm MOSFETs with source/drain-to-gate nonoverlapped structure

A MOSFET structure with a nonoverlapped source/drain (S/D) to gate region was proposed to overcome the challenges in sub-50-nm CMOS devices. Key device characteristics were investigated by extensive simulation study. Fringing gate electric field through the spacer induces an inversion layer in the nonoverlap region to act as an extended S/D region. An oxide spacer is used to reduce parasitic gate overlap capacitance. A reasonable amount of inversion electrons were induced under the spacers. Internal physics, speed characteristics, short channel effects, and RF characteristics were studied with the nonoverlap distance at a fixed metallurgical channel length of 40 nm. The proposed structure had good drain-induced barrier lowering and V/sub T/ rolloff characteristics and showed reasonable intrinsic gate delay and cutoff frequency compared to those of an overlapped structure.     

A 6-ns ECL 100 K I/O and 8-ns 3.3-V TTL I/O 4-Mb BiCMOS SRAM

The authors report a 4 M word×1 b/1 M word×4 b BiCMOS SRAM that can be metal mask programmed as either a 6-ns access time for an ECL 100 K I/O interface to an 8-ns access time for a 3.3-V TTL I/O interface. Die size is 18.87 mm×8.77 mm. Memory cell size is 5.8 μm×3.2 μm. In order to achieve such high-speed address access times the following technologies were developed: (1) a BiCMOS level converter that directly connects the ECL signal level to the CMOS level; (2) a high-speed BiCMOS circuit with low threshold voltage nMOSFETs; (3) a design method for determining the optimum number of decoder gate stages and the optimum size of gate transistors; (4) high-speed bipolar sensing circuits used at 3.3-V supply voltage; and (5) 0.55-μm BiCMOS process technology with a triple-well structure     

A spot-size transformer based on mode interference

A novel mode-size transformer based on interference between guided and leaky modes is proposed and analyzed. Simulation shows significant improvement in spot-size transform efficiency per unit length, in comparison with the conventional tapered waveguide mode size converters based on mode evolution. Owing to its structural simplicity, easy fabrication is another merit of the new spot-size transformer     

A typed functional extension of logic programming

A logic language is suitable for specification if it is equipped with features for data abstraction and modularization. In this paper, an effective mechanism to incorporate function and type into logic programming is presented as the means to embed data abstraction mechanism into logic programming. This incorporation is essentially based on Horn clause logic with equality and a polymorphic type system that is an extension of Mycroft and O’Keefe’s system. This paper also presents an implementation based on Warren Abstract Machine (WAM) and shows the performance, along with a comparison with WAM.     

Structure of microporous polypropylene sheets containing CaCO3 filler

The microporous polypropylene sheets were prepared by biaxially stretching polypropylene sheets containing CaCO₃ filler (particle size, 0.08–3.0 μm), when the CaCO₃ filler content was 59% by weight and the stretching ratio was 2.8 × 1.8. The microstructure of the sheets were investigated in relation to the CaCO₃ particle size by a N₂ gas permeation method. (1) Effective porosity increases with decreasing mean particle size of filler. (2) The tortuosity factor of the pore is in the range of 25–40 and becomes relatively smaller with decreasing mean particle size of filler. (3) The equivalent pore size becomes relatively smaller with decreasing mean particle size of filler.     

Synthesis and characterization of poly(siloxane-urethane)s

A series of polyurethane block copolymers based on hydroxy-terminated polydimethylsiloxane and poly(propylene glycol) soft segments of molecular weights 1818 and 2000, respectively, were synthesized. The hard segments consisted of 4,4′-diphenylnethane diisocyanate and 1,4-butanediol as the chain extender. Samples with different molar ratios were prepared. We tried to synthesize polydimethylsiloxane-based polyurethanes (PDMS-PU) containing a hard block as major fraction and a soft block as minor fraction for preparing toughened rigid systems. After a study of the pure polydimethylsiloxane-based polyurethane and poly(propylene glycol)-based polyurethane (PPG-PU), (mixed polyol)-based block copolymers and blends of PDMS-PU and PPG-PU were synthesized, and characterized by means of differential scanning calorimetry, tensile testing and scanning electron microscopy. In (mixed polyol)-based copolymers and lower hard-segment content blends, macro-phase separation occurred, but blends with higher hard-segment contents showed significant reduction in amounts of phase separation.     

A novel on-chip electrostatic discharge (ESD) protection withcommon discharge line for high-speed CMOS LSIs

A novel on-chip electrostatic discharge (ESD) protection for high-speed CMOS LSI's that operate at higher than 500 MHz has been developed. Introduction of a newly developed common discharge line (CDL) can completely eliminate the protection device influence on the inner circuit operation. This enables minimization of the I/O capacitance by shrinking the dimension of the output transistor, which also serves as a protection device in conventional devices. This new protection (CDL protection) was applied to a high-speed DRAM of which I/O pin capacitance specification is 2 pF. As a result, the ESD tolerance of 4 kV for the charged device model test, 4 kV for the human body model test, and 700 V for the machine model test were obtained. In addition, the DRAM data rate higher than 660 MHz at room temperature was achieved. The results show significant improvement for both ESD and the I/O capacitance, compared with the conventional structure     

Phenotypic diversity and kinetics of proliferating microglia and astrocytes following cortical stab wounds

Brain injury induces reactive gliosis, characterized by increased expression of glial fibrillary acidic protein (GFAP), astrocyte hypertrophy, and hyperplasia of astrocytes and microglia. One hypothesis tested in this study was whether ganglioside GD3+ glial precursor cells would contribute to macroglial proliferation following injury. Adult rats received a cortical stab wound. Proliferating cells were identified by immunostaining for proliferating cell nuclear antigen (PCNA) and by [3H]-thymidine autoradiography, and cell phenotypes by immunocytochemical staining for GD3, GFAP, ED1 (for reactive microglia) and for Bandeiraea Simplicifolia isolectin-B4 binding (all microglia). Animals were labeled with thymidine at 1,2,3, and 4 days postlesion (dpl) and sacrificed at various times thereafter. Proliferating cells of each phenotype were quantified. A dramatic upregulation of GD3 on ramified microglia was seen in the ipsilateral hemisphere by 2 dpl. Proliferating cells consisted of microglia and fewer astrocytes. Microglia proliferated maximally at 2-3 dpl and one third to one half were GD3+. Astrocytes proliferated maximally at 3-4 dpl, and some were also GD3+. Both ramified and ameboid forms of microglia proliferated and by 4 dpl all GD3+ microglia were ED1+ and vice versa. In the contralateral cortex microglia expressed neither GD3 nor ED1. Thus they acquired these antigens when activated. Neither microglia nor astrocytes that were thymidine-labeled at 2, 3, or 4 dpl changed in number in subsequent days. Most thymidine+ astrocytes were large GFAP+ reactive cells that clearly arose from pre-existing astrocytes, not from GD3+ glial precursors. In this model of injury microglia proliferate earlier and to a much greater extent than astrocytes, they can divide when in ramified form, and GD3 is up-regulated in most reactive microglia and in a subset of reactive astrocytes. We also conclude that microglial proliferation precedes proliferation of invading blood-borne macrophages.