Effect of silver content on thermal fatigue life of Sn-xAg-0.5Cu flip-chip interconnects

The thermal fatigue properties of Sn-xAg-0.5Cu (x=1, 2, 3, and 4 in mass%) flip-chip interconnects were investigated to study the effect of silver content on thermal fatigue endurance. The solder joints with lower silver context (x=1 and 2) had a greater failure rate compared to those with higher silver content (x=3 and 4) in thermal fatigue testing. Cracks developed in the solders near the solder/chip interface for all joints tested. This crack propagation may be mainly governed by the nature of the solders themselves because the strain-concentrated area was similar for tested alloys independent of the silver content. From the microstructural observation, the fracture was a mixed mode, transgranular and intergranular, independent of the silver content. Higher silver content alloys (x=3 and 4) had finer Sn grains before thermal cycling according to the dispersion of the Ag₃Sn intermetallic compound, and even after the cycling, they suppressed microstructural coarsening, which degrades the fatigue resistance. The fatigue endurance of the solder joints was strongly correlated to the silver content, and solder joints with higher silver content had better fatigue resistance.     

A 1.3-GHz fifth-generation SPARC64 microprocessor

A fifth-generation SPARC64 processor is fabricated in 130-nm partially depleted silicon-on-insulator CMOS with eight layers of Cu metallization. At V/sub dd/ = 1.2 V and T/sub a/ = 25/spl deg/C, it runs at 1.3 GHz and dissipates 34.7 W. The chip contains 191 M transistors with 19 M logic circuits in an area of 18.14 mm /spl times/ 15.99 mm and is covered with 5858 bumps, of which 269 are for I/O signals. It is mounted in a 1360-pin land-grid-array package. The 16-byte-wide system bus operates with a 260-MHz clock in single-data-rate or double-data-rate modes. This processor implements an error-detection mechanism for execution units and data path logic circuits in addition to on-chip arrays to detect data corruption. Intermittent errors detected in execution units and data paths are recovered via instruction retry. A soft barrier clocking scheme allows amortization of the clock skew and jitter over multiple cycles and helps to achieve high clock frequency. Tunability of the clock timing makes timing closure easier. A relatively small amount of custom circuit design and the use of mostly static circuits contributes to achieve short development time.     

A 64-Mb DRAM with meshed power line

A 64-Mb dynamic RAM (DRAM) has been developed with a meshed power line (MPL) and a quasi-distributed sense-amplifier driver (qDSAD) scheme. It realizes high speed, t_RAS=50 ns (typical) at V_cc=3.3 V, and 16-b input/output (I/O). This MPL+qDSAD scheme can reduce sensing delay caused by the metal layer resistance. Furthermore, to suppress crosstalk noise, a V_SS shield peripheral layout scheme has been introduced, which also widens power line widths. This 64-Mb DRAM was fabricated with 0.4-μm CMOS technology using KrF excimer laser lithography. A newly developed memory cell structure, the tunnel-shaped stacked-capacitor cell (TSSC), was adapted to this 64-Mb DRAM     

Wideband optical transmission in smectic liquid crystal lightmodulator at room temperature

Video rate optical transmission at room temperature (RT) for smectic liquid crystal light modulators (SLCLMs) and filter circuits has been demonstrated. The bandwidth of this system has been determined to be 5.6 MHz. Optical transmission of the National Television System Committee (NTSC) video signal at RT has been realised     

Removal of Interlayer Water of two Ti3C2Tx MXenes as a Versatile Tool for Controlling the Fermi-Level Pinning-Free Schottky Diodes with Nb:SrTiO3

Striving for the sixth-generation communication technology discovery, semiconductors beyond Si with wider bandgaps as well as non-conventional metals are actively being sought to achieve high speeds whilst maintaining devices miniaturization. 2D materials may provide the potential for downsizing, but their functional advantage over existing counterparts still longs to be discovered. Along that path, surface-adsorbed or bulk-intercalated water molecules remaining after wet-chemical synthesis of 2D materials are generally seen as obstacles to high-performance achievement. Herein, the control of such water within the interlayers of solution-processed metallic 2D titanium carbide (MXene) by vacuum annealing duration is demonstrated. Moreover, the impact of water removal on work function (WF) and functional terminations is unveiled for the first time. Furthermore, the usefulness of such water for controlling a novel Schottky diode in contact with an n-type oxide semiconductor, niobium-doped strontium titanate (Nb:SrTiO₃) is observed. The advantage of MXene compared to conventional gold as facile processing, WF tunability, and lower turn-on voltage in the Schottky anode application is highlighted. This fundamental study shows the way for a novel Schottky diode preparation in atmospheric conditions and provides implications for further research directions aiming at commercialization.     

Efficient electron transport in 4,4′-bis[N-(1-napthyl)-N-phenyl-amino] biphenyl and the applications in white organic light emitting devices

The electron transport capability of 4,4′-bis[N-(1-napthyl)-N-phenyl-amino] biphenyl (α-NPD) was investigated by fundamental physical measurements named as current–voltage (I–V) electrical property evaluation and displacement current measurement (DCM). In electron-dominated devices, the I–V characteristics of α-NPD were similar as that of (8-hydroxyquinolino) aluminum (Alq₃) owing to their same order of electron mobilities. The interface of Al/LiF and α-NPD was proven to be an Ohmic contact through the evaluation of I–V characteristics at low bias regime (<3 V). And an electron injection barrier, 0.21 eV, at Al/LiF/α-NPD was obtained by extrapolating the temperature dependent I–V curves. The electron transport behavior in α-NPD film was further confirmed by DCM evaluations. Furthermore, an efficient white organic light emission device was successfully fabricated by using α-NPD as hole transport layer and electron transport layer, respectively.     

Development of a standing style transfer system "ABLE" for disabled lower limbs

We have developed a standing style transfer system, or "ABLE," for a person with disabled legs. It allows travel in a standing posture even on uneven ground, a standing up motion from a chair, and allows the stairs. ABLE consists of three modules: a pair of telescopic crutches, a powered lower extremity orthosis, and a pair of mobile platforms. We present here the conceptual design of ABLE and the motion of each module. Cooperative operations using the three modules are discussed through simulations. The standing up motion from a chair and ascending the stairs, however, have problems with adaptability to the environment and safety, because it executes the movement that has till now relied on telescopic crutches. To solve these problems, we propose a new motion technique and compare it with the previous one. In this paper, some experimental results are also presented.     

Stress-induced voiding in stacked tungsten via structure

The stress-induced voiding (SV) in Al-alloy films with stacked tungsten via structures was investigated. Voids were found in interconnections with stacked and borderless vias that had resistance increase after the aging tests. Failure occurs most frequently when the test structures are stored at approximately 250°C. This behavior can be explained by the diffusion creep model similar to SV in a flat line [1]. Finite-element simulations show that tensile stress in Al-lines between upper and lower plugs increases with temperature increase over 175°C. Al grains on W-plugs were found to have high-angle crystalline misorientation in transmission electron microscopy (TEM) observation. The tensile stress and grain misorientation should accelerate the void growth during high temperature storage. O₂ plasma post metal etch treatment is effective to eliminate SV in stacked via structure.     

Origin of electron mobility enhancement in (1 1 1)-oriented InGaAs channel metal-insulator-semiconductor field-effect-transistors

Electrical and physical characteristics of the Al₂O₃/InGaAs interfaces with (1 1 1)A and (1 0 0) orientations were investigated in an attempt to understand the origin of electron mobility enhancement in the (1 1 1)A-channel metal-insulator-semiconductor field-effect-transistor. The (1 1 1)A interface has less As atoms of high oxidation states as probed by X-ray photoelectron spectroscopy. The electrical measurements showed that energy distribution of the interface traps for the (1 1 1)A interface is shifted toward the conduction band as compared to that for the (1 0 0) interface. Laterally-compressed cross-section transmission electron microscopy images showed that the characteristic lengths of the interface roughness are different between the (1 1 1)A and (1 0 0) interfaces. The contributions of the Coulomb and roughness scattering mechanisms are discussed based on the experimental results.     

An on-chip active decoupling circuit to suppress crosstalk in deep-submicron CMOS mixed-signal SoCs

A decoupling circuit using an operational amplifier is proposed to suppress substrate crosstalk in mixed-signal system-on-chip (SoC) devices. It overcomes the parasitic inductance problem of on-chip capacitor decoupling. The effect of the proposed decoupling circuit is not limited by parasitic fine impedance. A 0.13-/spl mu/m CMOS test chip showed that substrate noise at frequencies from 40 MHz to 1 GHz was incrementally suppressed by sequentially activating three of the proposed circuits in parallel. The power dissipation of each circuit was 3.3 mW at a 1.0-V power supply. The test chip measurement showed that the proposed decoupling reduced crosstalk by 31% at 200 MHz, whereas it was reduced by 4.4% with capacitor decoupling. This 7:1 ratio, or 17 dB, corresponds to the gain of the opamp. Design of the opamp and its feedback loop for active decoupling is simple, making the opamp useful for SoC applications.