Performance Analysis on Coexistence of EDCA and Legacy DCF Stations in IEEE 802.11 Wireless LANs

The distributed coordination function (DCF) scheme of IEEE 802.11 MAC protocol does not support any concepts of quality of service (QoS) but the enhanced distributed channel access (EDCA) scheme in IEEE 802.11e standard provides QoS according to access categories using different access parameters. However, the legacy DCF stations may be used together with EDCA stations. In this letter, we investigate and analyze the performance discrimination when EDCA and DCF stations operate simultaneously     

Design,Implementation, and Validation of KOMPSAT‐2 Software Simulator

In this paper, we present design features, implementation, and validation of a satellite simulator subsystem for the Korea Multi‐Purpose Satellite‐2 (KOMPSAT‐2). The satellite simulator subsystem is implemented on a personal computer to minimize costs and trouble on embedding onboard flight software into the simulator. An object‐oriented design methodology is employed to maximize software reusability. Also, instead of a high‐cost commercial database, XML is used for the manipulation of spacecraft characteristics data, telecommand, telemetry, and simulation data. The KOMPSAT‐2 satellite simulator subsystem is validated by various simulations for autonomous onboard launch and early orbit phase operations, anomaly operation, and science fine mode operation. It is also officially verified by successfully passing various tests such as the satellite simulator subsystem test, mission control element system integration test, interface test, site installation test, and acceptance test.     

Pipelined Scheduling of Functional HW/SW Modules for Platform‐Based SoC Design

We developed a pipelined scheduling technique of functional hardware and software modules for platform‐based system‐on‐a‐chip (SoC) designs. It is based on a modified list scheduling algorithm. We used the pipelined scheduling technique for a performance analysis of an MPEG4 video encoder application. Then, we applied it for architecture exploration to achieve a better performance. In our experiments, the modified SoC platform with 6 pipelines for the 32‐bit dual layer architecture shows a 118% improvement in performance compared to the given basic SoC platform with 4 pipelines for the 16‐bit single‐layer architecture.     

Growth of tin whiskers for lead-free plated leadframe packages in high humid environments and during thermal cycling

Growth behavior of tin whiskers from pure tin and tin–bismuth plated leadframe (LF) packages for elevated temperature and high humidity storages and during thermal cycling was observed. In the storage at 60 °C/93% relative humidity (RH) and 85 °C/85%RH the galvanic corrosion occurred at the outer lead toes and shoulders where the base LF material is exposed, forming tin oxide layers of SnO₂. The corroded layers spread inside the film and formed whiskers around the corroded islands. Many whiskers were observed to grow from grain boundaries for the Fe–42Ni alloy (alloy42) LF packages. It was confirmed that the corrosion tends to occur on the side surfaces of outer leads adjacent to the mold flash. The contribution of ionic contaminants in epoxy mold compound (EMC) to the corrosion was not identified. During thermal cycling between −65 °C and +150 °C whiskers grew out of as-deposited grains for pure tin-plated alloy42 LF packages and they grew linearly with an increase of number of cycle. Growth mechanisms of the whiskers from grain boundaries and as-deposited grains were discussed from the deformation mechanism map for tin and mathematical calculation with a steady-state diffusion model.     

Synthesis of ZSM‐5 Films and Monoliths with Bimodal Micro/Mesoscopic Structures

A route to synthesize ZSM‐5 crystals with a bimodal micro/mesoscopic pore system has been developed in this study; the successful incorporation of the mesopores within the ZSM‐5 structure was performed using tetrapropylammonium hydroxide (TPAOH)‐impregnated mesoporous materials containing carbon nanotubes in the pores, which were encapsulated in the ZSM‐5 crystals during a solid rearrangement process within the framework. Such mesoporous ZSM‐5 zeolites can be readily obtained as powders, thin films, or monoliths.     

Stress Relief Principle of Micron‐Sized Anodes with Large Volume Variation for Practical High‐Energy Lithium‐Ion Batteries

Practical applications of high gravimetric and volumetric capacity anodes for next‐generation lithium‐ion batteries have attracted unprecedented attentions, but still faced challenges by their severe volume changes, rendering low Coulombic efficiency and fast capacity fading. Nano and void‐engineering strategies had been extensively applied to overcome the large volume fluctuations causing the continuous irreversible reactions upon cycling, but they showed intrinsic limit in fabrication of practical electrode condition. Achieving high electrode density is particularly paramount factor in terms of the commercial feasibility, which is mainly dominated by the true density and tapping density of active material. Herein, based on finite element method calculation, micron‐sized double passivation layered Si/C design is introduced with restrictive lithiation state, which can withstand the induced stress from Li insertion upon repeated cycling. Such design takes advantage in structural integrity during long‐term cycling even at high gravimetric capacity (1400 mAh g^?1). In 1 Ah pouch‐type full‐cell evaluation with high mass loading and electrode density (≈3.75 mAh cm^?2 and ≈1.65 g cm^?3), it demonstrates superior cycle stability without rapid capacity drop during 800 cycles.     

Tensile-Strained Germanium CMOS Integration on Silicon

Monolithic integration of tensile-strained Si/ Germanium (Ge)-channel n-MOS and tensile-strained Ge p-MOS with ultrathin (equivalent oxide thickness ~14 Aring) HfO₂ gate dielectric and TaN gate stack on Si substrate is demonstrated. Defect-free Ge layer (279 nm) grown by ultrahigh vacuum chemical-vapor deposition is achieved using a two-step Ge-growth technique coupled with compliant Si/SiGe buffer layers. The epi-Ge layer experiences tensile strain of up to ~0.67% and exhibits a peak hole mobility of 250 cm²/V ldr s which is 100% higher than the universal Si hole mobility. The gate leakage current is two orders of magnitude lower compared to the reported results on Ge bulk.     

A 0.9 V 96 μW Fully Operational Digital Hearing Aid Chip

A 0.9 V 96 muW fully operational low-power digital hearing aid chip is proposed and implemented. An internal status controller is introduced to achieve full operation of the adaptive-SNR analog front end. Dedicated DSP with an additional volume control parameter eliminates any internal overflow and enables the hearing aid to be customized for each individual user. When the input audio band is split into a low band and a high band, the audio signal can be processed coarsely. In addition, fine processing of the high-band signal can be obtained with a low-power automatic gain control (AGC) comprising a digital comparator and a subtraction unit. A heterogeneous Sigma-Delta DAC reduces the power consumption of the interpolation filter without degrading performance by allowing different frequencies between the input signal and the sampling clock of the Sigma-Delta modulator. Compared with a conventional Sigma-Delta DAC, the heterogeneous Sigma-Delta DAC reduces the power dissipation by 40.4% and the area occupation by 40.5%, and it has a reported error rate of only 0.16%. The fabricated chip achieves a 79 dB peak SNR with 4.1 muVrms of input-referred noise voltage. The core area is 2.8 mm x 1.1 mm in a 0.18 mum standard CMOS process.     

A zero-voltage and zero-current switching full bridge DC-DCconverter with transformer isolation

A new primary-side-assisted zero-voltage and zero-current switching full bridge DC-DC converter with transformer isolation is proposed. The proposed DC-DC converter uses only one auxiliary transformer and two diodes to obtain ZCS for the leading leg. It has a simple and robust structure, and load current control capability even in short circuit conditions, The possibility of magnetic saturation due to asymmetricity of circuits or transient phenomena is greatly reduced, which is a very attractive feature in DC-DC converters with transformer isolation. The power rating of the auxiliary transformer is about 10% of that of the main transformer. Operation of a 12 kW prototype designed for welding application was verified by experiments