ASTM民用核电强化培训项目

公共和私营部门在标准化领域的合作是非常有效且有益的。当此类合作跨越国界时,知识的获得就会更加广泛,得到的回报也就更多样了。ASTM国际标准组织目前举办了民用核电强化培训课程,最值得一提的当属韩国标准协会及其业界的培训。培训资金主要来源于韩国政府,还有一部分支持来自业界。此次培训项目是一个成功的典范,ASTM负责后勤保障和所培训的内容。     

Cost‐Efficient Virtual Optical Network Embedding for Manageable Inter‐Data‐Center Connectivity

Network virtualization opens the door to novel infrastructure services offering connectivity and node manageability. In this letter, we focus on the cost‐efficient embedding of on‐demand virtual optical network requests for interconnecting geographically distributed data centers. We present a mixed integer linear programming formulation that introduces flexibility in the virtual‐physical node mapping to optimize the usage of the underlying physical resources. Illustrative results show that flexibility in the node mapping can reduce the number of add‐drop ports required to serve the offered demands by 40%.     

Modeling,classifying and annotating weakly annotated images using Bayesian network

In this paper, we propose a probabilistic graphical model to represent weakly annotated images. We consider an image as weakly annotated if the number of keywords defined for it is less than the maximum number defined in the ground truth. This model is used to classify images and automatically extend existing annotations to new images by taking into account semantic relations between keywords. The proposed method has been evaluated in visual-textual classification and automatic annotation of images. The visual-textual classification is performed by using both visual and textual information. The experimental results, obtained from a database of more than 30,000 images, show an improvement by 50.5% in terms of recognition rate against only visual information classification. Taking into account semantic relations between keywords improves the recognition rate by 10.5%. Moreover, the proposed model can be used to extend existing annotations to weakly annotated images, by computing distributions of missing keywords. Semantic relations improve the mean rate of good annotations by 6.9%. Finally, the proposed method is competitive with a state-of-art model.     

Review of antenna technologies for very high frequency Data Exchange Systems

The Automated Identification System (AIS) was originally developed as a terrestrial system tracking vessels near the coastline. Dedicated channels were allocated within the spectrum historically reserved for maritime applications in the very high frequency (VHF) band, enabling long range communications, up to a few kilometers. There have been various initiatives in the last decade that extended this system with a space segment, enabling global monitoring of vessels beyond the range of terrestrial stations. Recently, the World Radiocommunication Conference has allocated frequencies for the extension of this system to a two-way VHF Data Exchange System (VDES) via satellite. This requires to adapt spaceborne antenna solutions previously developed for AIS, particularly for missions using small satellites and CubeSats. This paper provides a timely review of existing VHF antenna solutions and new concepts under development which could be applicable to VDES missions. Some key metrics are identified to provide a comparative study between various candidate solutions. Considering the range of possible missions, from secondary payloads on-board larger satellites to dedicated constellations, it is believed that a number of antenna products can find application in future VDES space-based infrastructure.     

Low-Power Parallel Video Compression Architecture for a Single-Chip Digital CMOS Camera

A low-power, large-scale parallel video compression architecture for a single-chip digital CMOS camera is discussed in this paper. This architecture is designed for highly computationally intensive image and video processing tasks necessary to support video compression. Two designs of this architecture, an MPEG2 encoder and a DV encoder, are presented. At an image resolution of 640 × 480 pixels (MPEG2) and 720 × 576 (DV) and a frame rate of 25 to 30 frames per second, a computational throughput of up to 1.8 billion operations per second (BOPS) is required. This is supported in the proposed architecture using a 40 MHz clock and an array of 40 to 45 parallel processors implemented in a 0.2 m CMOS technology and with a 1.5 V supply voltage. Power consumption is significantly reduced through the single-chip integration of the CMOS photo sensors, the embedded DRAM technology, and the proposed pipelined parallel processors. The parallel processors consume approximately 45 mW of power resulting a power efficiency of 40 BOPS/W.     

A Memristive Nanoparticle/Organic Hybrid Synapstor for Neuroinspired Computing

A large effort is devoted to the research of new computing paradigms associated with innovative nanotechnologies that should complement and/or propose alternative solutions to the classical Von Neumann/CMOS (complementary metal oxide semiconductor) association. Among various propositions, spiking neural network (SNN) seems a valid candidate. i) In terms of functions, SNN using relative spike timing for information coding are deemed to be the most effective at taking inspiration from the brain to allow fast and efficient processing of information for complex tasks in recognition or classification. ii) In terms of technology, SNN may be able to benefit the most from nanodevices because SNN architectures are intrinsically tolerant to defective devices and performance variability. Here, spike‐timing‐dependent plasticity (STDP), a basic and primordial learning function in the brain, is demonstrated with a new class of synapstor (synapse‐transistor), called nanoparticle organic memory field‐effect transistor (NOMFET). This learning function is obtained with a simple hybrid material made of the self‐assembly of gold nanoparticles and organic semiconductor thin films. Beyond mimicking biological synapses, it is also demonstrated how the shape of the applied spikes can tailor the STDP learning function. Moreover, the experiments and modeling show that this synapstor is a memristive device. Finally, these synapstors are successfully coupled with a CMOS platform emulating the pre‐ and postsynaptic neurons, and a behavioral macromodel is developed on usual device simulator.     

A new fuzzy logic-based controller design method for DC and ACimpressed-voltage drives

This paper deals with the design of fuzzy logic-based controllers (FLBC) for DC and AC electric drives. Industrial drives employ the cascaded PI control with a subordinated current control loop to make sure that the current does not exceed the admissible value and improve dynamic performances. The nonlinear FLBC characteristics permit one to achieve the performances of the cascaded control using only one control loop. This is feasible by a suitable choice of the scaling factors together with the rules of the fuzzy controller. The authors propose a minimum number of rules and the criteria, based on physical considerations, to determine the input and output gains instead of using the trial and error procedure. The designed FLBC is able to control the speed of a DC drive as well as the rotor speed and flux of a vector-controlled induction motor drive. Computer simulations show the effectiveness of the new fuzzy-controller design method. The reduced number of rules and membership functions and the application flexibility together with the possible implementation on low cost μPs lead the authors to think that the proposed tuning criteria will be widely adopted     

Power consumption reduction through elastic data rate adaptation in survivable multi-layer optical networks

Network survivability requires the provisioning of backup resources in order to protect active traffic against any failure scenario. Backup resources, however, can remain unused most of the time while the network is not in failure condition, inducing high power consumption wastage, if fully powered on. In this paper, we highlight the power consumption wastage of the additional resources for survivability in IP/multi-protocol label switching (MPLS) over dense wavelength division multiplexing multi-layer optical networks. We assume MPLS protection switching as the failure recovery mechanism in the network, a solution interesting for current network operators to ensure fast recovery as well as fine-grained recovery treatment per label switched path. Next, we quantitatively show how elastic optical technologies can effectively reduce such a power consumption by dynamically adjusting the data rate of the transponders to the carried amount of traffic.     

Optimized Implementation of RNS FIR Filters Based on FPGAs

In this paper optimized Residue Number System (RNS) arithmetic blocks to better exploit some of the architectural characteristics of the last generation FPGAs are presented. The implementation of modulo m adders, modulo m constant and general multipliers, input and output converters are presented. These architectures are based on moduli sets chosen in order to optimally use the 6-input Look-Up Tables (LUTs) available in the Complex Logic Blocks (CLBs) of the new generation FPGAs. Experiments based on the implementation of Finite Impulse Response (FIR) filters characterized by different number of taps and wordlengths shows that the use of RNS together with suitable moduli sets optimally fits the 6-input LUTs in the last generation FPGAs architectures.     

Optimal design of Service Overlay Networks with economic and performance constraints

In the last years, Service Overlay Networks (SONs) have emerged as a promising means to address some of the issues (e.g. end‐to‐end QoS) affecting the current Internet and to favor the development and deployment of new value‐added Internet services. The deployment of an SON is a capital‐intensive investment, since bandwidth with certain QoS guarantees must be purchased from the individual network domains through bilateral Service Level Agreements. Thus, minimizing the economic cost of the logical end‐to‐end service delivery infrastructure is one of the key objectives for the SON provider. When a SON is aimed at end‐to‐end QoS provisioning, its topology must be designed so as to also satisfy the specific requirements of QoS‐sensitive applications. This paper deals with the problem of planning the SON topology in order to take into account both cost and QoS constraints. More specifically, the paper proposes a set of new algorithms for the design of an optimized SON topology, which minimizes the economic cost while simultaneously meeting bandwidth and delay constraints. A performance comparison among such algorithms is finally carried out. Copyright © 2009 John Wiley & Sons, Ltd.