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81.
Nowadays, switched Ethernet networks are used in complex systems that encompass tens to hundreds of nodes and thousands of signals. Such scenarios require multi-switch architectures where communications frequently occur in multiple hops. In this paper we investigate techniques to allow efficient multi-hop communication using HaRTES switches. These are modified Ethernet switches that provide real-time traffic scheduling, dynamic bandwidth management and temporal isolation between real-time and non-real-time traffic. This paper addresses the problem of forwarding traffic in HaRTES networks. Two methods have been recently proposed, namely Distributed Global Scheduling (DGS) that buffers traffic between switches, and Reduced Buffering Scheme (RBS), that uses immediate forwarding. In this paper, we discuss the design and implementation of RBS within HaRTES and we carry out an experimental validation with a prototype implementation. Then, we carry out a comparison between RBS and DGS using worst-case response time analysis and simulation. The comparison clearly establishes the superiority of RBS concerning end-to-end response times. In fact, with sample message sets, we achieved reductions in end-to-end delay that were as high as 80 %.  相似文献   
82.
Ingress nodes in optical burst switching (OBS) networks are responsible for assembling burst from incoming packets and forwarding these bursts into the OBS network core. Changes in the statistical characteristics of a traffic stream at an ingress switch can affect the capacity of the network to provide quality of service. Therefore, the statistical characteristics of the output flow of an ingress node must be known for appropriate network dimensioning. This paper evaluates the impact of burst assembly mechanisms on the scaling properties of multifractal traffic flows. Results show that the factor most relevant in determining the nature of the output traffic flow is the relationship between the cut-off time scale of the input traffic and the time scale of assembly threshold. Moreover, a procedure for the detection of the cut-off scale of incoming traffic is introduced.  相似文献   
83.
84.
Ultrathin films of poly(thiophene) (PT) and poly(bithiophene) (PBT) were prepared by electrochemical route using ionic liquid (BFEE) as medium and electrolyte. Distinct morphologies and electrical properties were observed in these materials. To evaluate its response in photovoltaics, these films were used as active layer in bilayer geometry solar cells with the electron acceptor molecule C60. The best performance was observed for PT films. In order to probe the differences in molecular dynamics and structural order, ultrafast electron dynamics in the low-femtosecond regime was evaluated by resonant Auger spectroscopy using the core–hole clock method at the sulfur K absorption edge. Electron delocalization times for the different polymeric films were derived as a function of the excitation energy. Photoabsorption measurements were conducted and molecular orientation derived. These results corroborated with the morphology found for these films and thus the performance of PT and PBT in the devices, and with the proposed conduction mechanism.  相似文献   
85.
This paper presents a hand-held microsystem based on new fully integrated magnetoresistive biochips for biomolecular recognition (DNA hybridization, antibody antigen interaction, etc.). Magnetoresistive chip surfaces are chemically treated, enabling the immobilization of probe biomolecules such as DNA or antibodies. Fluid handling is also integrated in the biochip. The proposed microsystem not only integrates the biochip, which is an array of 16times16 magnetoresistive sensors, but it also provides all the electronic circuitry for addressing and reading out each transducer. The proposed architecture and circuits were specifically designed for achieving a compact, programmable and portable microsystem. The microsystem also integrates a hand-held analyzer connected through a wireless channel. A prototype of the system was already developed and detection of magnetic nanoparticles was obtained. This indicates that the system may be used for magnetic label based bioassays  相似文献   
86.
This paper introduces an energy management strategy based on fuzzy logic supervisory for road electric vehicle, combining a fuel cell power source and two energy storage devices, i.e., batteries and ultracapacitors. The control strategy is designed to achieve the high-efficiency operation region of the individual power source and to regulate current and voltage at peak and average power demand, without compromising the performance and efficiency of the overall system. A multiple-input power electronic converter makes the interface among generator, energy storage devices, and the voltage dc-link bus. Classical regulators implement the control loops of each input of the converter. The supervisory system coordinates the power flows among the power sources and the load. The paper is mainly focused on the fuzzy logic supervisory for energy management of a specific power electronic converter control algorithm. Nevertheless, the proposed system can be easily adapted to other converters arrangements or to distributed generation applications. Simulation and experimental results on a 3-kW prototype prove that the fuzzy logic is a suitable energy management control strategy.  相似文献   
87.
This paper investigates the control of a single-phase three-leg ac/ac reversible converter in which a leg is shared by both the grid and the load side. Pulsewidth-modulation (PWM) techniques based on scalar and vector approaches are developed, introducing the concept of local and general apportioning factor and, also, a complete equivalence between scalar and space vector PWM. A hysteresis current controller capable of taking into account the shared leg is developed and a zero current error linear controller is presented. Furthermore, a control strategy to obtain maximum utilization of the dc-bus voltage is proposed. In addition, several relevant characteristics of the converter are addressed, such as voltage rating, harmonic distortion, shared leg and capacitor currents, and power rating. The converter is compared to four-leg and two-leg converters. Experimental results are presented.  相似文献   
88.
Constant-frequency sliding-mode and linear proportional integral (PI) cascaded controllers (internal current loop and external output voltage control loop) for 12-pulse thyristor rectifiers are designed, using new models and convenient assumptions, and their performances compared. The use of sliding-mode control on line-commutated power converters implies the use of fixed-frequency sliding-mode design, originating steady-state errors. These are eliminated using a higher order switching function, with fourth-order Bessel polynomial coefficients, to minimize the response time and to eliminate the overshoot in the reaching mode. Comparisons are made using simulations (MATLAB/SIMULINK blocks) and experimental results. The sliding-mode controllers, as well as the PI controllers, need almost the same hardware and present no steady-state errors and no output voltage overshoots. Besides allowing a faster dynamics than the PI controllers, the proposed sliding-mode approach provides a new, nonlinear theoretical frame for solving the control problem of power rectifiers with output filters  相似文献   
89.
High-switching frequency associated with soft commutation techniques is a trend in switching converters. Following this trend, a buck pulsewidth modulation (PWM) converter is presented. The DC voltage conversion ratio of this converter has a quadratic dependence on duty cycle, providing a large stepdown. This new buck quadratic PWM soft-single-switched converter, having only a single active switch, provides a high efficient operating condition for a wide load range at high-switching frequency. In order to illustrate the operating principle of this new converter, a detailed study including theoretical analysis, relevant equations and simulation, and experimental results is carried out  相似文献   
90.
In digital CMOS circuits, parametric yield improvement may be achieved by reducing the variability of performance and power consumption of individual cell instances. Such improvement of variation robustness can be attained by evaluating parameter variation impact at gate level. Statistical characterization of logic gates are usually obtained by computationally expensive electrical simulations. An efficient gate delay variability estimation method is proposed for variability-aware design. The proposed method has been applied to different topologies (transistor network arrangements) and CMOS gates, and it has been compared to Monte Carlo simulations for data validation, resulting in computation time savings.  相似文献   
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