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31.
监控和消除隐藏的电路缺陷已成为130nm和130nm以下器件的关键。这使得电子束检查正在广泛应用于开发、试生产和量产的监控过程。我们将描述当前铜逻辑和晶圆代工厂电子束检查技术的执行情况,其中包括详细的案例研究,它说明了从开发到量产过程中应用电子束检查技术的好处。我们也描述了过去克服通用工具障碍的方法。然后,分别介绍了利用电子束检查技术的新进展,以及为假设的20000WSPMφ300mm工厂模拟的最理想执行情况的最佳实例。  相似文献   
32.
We present a new analysis and visualization method for studying the functional relationship between the pulse morphology of pressure signals and time or signal metrics such as heart rate, pulse pressure, and means of pressure signals, such as arterial blood pressure and central venous pressure. The pulse morphology is known to contain potentially useful clinical information, but it is difficult to study in the time domain without the aid of a tool such as the method we present here. The primary components of the method are established signal processing techniques, nonparametric regression, and an automatic beat detection algorithm. Some of the insights that can be gained from this are demonstrated through the analysis of intracranial pressure signals acquired from patients with traumatic brain injuries. The analysis indicates the point of transition from low-pressure morphology consisting of three distinct peaks to a high-pressure morphology consisting of a single peak. In addition, we demonstrate how the analysis can reveal distinctions in the relationship between morphology and several signal metrics for different patients.  相似文献   
33.
34.
We present an interdigitated back‐contact silicon heterojunction system designed for liquid‐phase crystallized thin‐film (~10 µm) silicon on glass. The preparation of the interdigitated emitter (a‐Si:H(p)) and absorber (a‐Si:H(n)) contact layers relies on the etch selectivity of doped amorphous silicon layers in alkaline solutions. The etch rates of a‐Si:H(n) and a‐Si:H(p) in 0.6% NaOH were determined and interdigitated back‐contact silicon heterojunction solar cells with two different metallizations, namely Al and ITO/Ag electrodes, were evaluated regarding electrical and optical properties. An additional random pyramid texture on the back side provides short‐circuit current density (jSC) of up to 30.3 mA/cm2 using the ITO/Ag metallization. The maximum efficiency of 10.5% is mainly limited by a low of fill factor of 57%. However, the high jSC, as well as VOC values of 633 mV and pseudo‐fill factors of 77%, underline the high potential of this approach. Copyright © 2015 John Wiley & Sons, Ltd.  相似文献   
35.
Evidence is presented that two competing failure mechanisms exist in the Si-SiO2 system with one mechanism dominating at low dose rates and the other at high. Much lower dose failures than expected were discovered at low dose rates (<0.1 rad(Si)/s) and very low dose rates (∼0.001 rad(Si)/s) in commercial SGS 4007 CMOS devices. These failure doses plotted versus dose rate have a bell-shaped curve, rather than the expected straight line (decreasing with increasing dose rate), indicating that a different failure mechanism is dominant at low dose rates than at high.  相似文献   
36.
Microscale, quasi‐2D Au–polymer brush composite objects are fabricated by a versatile, controllable process based on microcontact printing followed by brush growth and etching of the substrate. These objects fold into 3D microstructures in response to a stimulus: crosslinked poly(glycidyl methacrylate) (PGMA) brushes fold on immersion in MeOH, and poly(methacryloxyethyl trimethylammonium chloride) (PMETAC) brushes fold on addition of salt. Microcages and microcontainers are fabricated. A multistep microcontact printing process is also used to create sheets of Au–PGMA bilayer lines linked by a PGMA film, which fold into cylindrical tubes. The bending of these objects can be predicted, and hence predefined during the synthesis process by controlling the parameters of the gold layer, and of the polymer brush.  相似文献   
37.
An open loop architecture for a reference voltage buffer in -converters is presented to achieve fast-settling, since the settling time of the references plays an important role in the global performance of sampled data converters. This design has been tested on a 2-1 -converter with an on-chip bandgap reference increasing the input related dynamic range up to 93.4 dB for a bandwidth of 99 kHz.  相似文献   
38.
Price  J.C. 《Electronics letters》2002,38(9):413-415
The frequency dependence of the resistance of commercial 1-1000 GΩ electrometer resistors has been measured from 30 Hz to 30 kHz. When scaled appropriately, the data for devices of similar geometry fall on a single curve, indicating that the frequency dependence is due to distributed capacitance, rather than to frequency dependence of the resistivity. The results are important for understanding noise performance when these devices are used as gate bias resistors in low-noise junction field effect transistor circuits  相似文献   
39.
The factors limiting the conductivity of fluorine‐doped tin dioxide (FTO) produced via atmospheric pressure chemical vapor deposition are investigated. Modeling of the transport properties indicates that the measured Hall effect mobilities are far below the theoretical ionized impurity scattering limit. Significant compensation of donors by acceptors is present with a compensation ratio of 0.5, indicating that for every two donors there is approximately one acceptor. Hybrid density functional theory calculations of defect and impurity formation energies indicate the most probable acceptor‐type defects. The fluorine interstitial defect has the lowest formation energy in the degenerate regime of FTO. Fluorine interstitials act as singly charged acceptors at the high Fermi levels corresponding to degenerately n‐type films. X‐ray photoemission spectroscopy of the fluorine impurities is consistent with the presence of substitutional FO donors and interstitial Fi in a roughly 2:1 ratio in agreement with the compensation ratio indicated by the transport modeling. Quantitative analysis through Hall effect, X‐ray photoemission spectroscopy, and calibrated secondary ion mass spectrometry further supports the presence of compensating fluorine‐related defects.  相似文献   
40.
Field Programmable Gate Arrays (FPGA) provide the invaluable feature of dynamic hardware reconfiguration by loading configuration bit files. However, this flexibility also opens up the threat of theft of Intellectual Property (IP) since these configuration files can be easily extracted and cloned. In this context, the ability to bind an application configuration to a specific device is an important step to prevent product counterfeiting. Furthermore, such a technology can also enable advanced business models such as device-specific feature activation. In this work, we present a new technique to generate entropy on FPGA device—based on data contention in the hardware circuitry. For this entropy, we use the output of intentionally generated write collisions in synchronous dual-ported block RAMs (BRAM). We show that the parts of this output generated by such write collisions can be either probabilistic but also deterministic and device-specific. The characteristics of such an entropy source can be used for a large variety of security applications, such as chip identification and device authentication. In addition to that, we also propose a solution to efficiently create cryptographic keys on-chip at runtime. As a last contribution, we eventually present a strategy how to transform this entropy source into a circuit for True Random Number Generation (TRNG).  相似文献   
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