Sloshing suppression control of liquid transfer systems considering a 3-D transfer path

In plants in many industries, there exist a lot of transfer systems with vibration mechanisms. While transfer without residual vibration is usually demanded in these plants, this requirement necessitates large numbers of sensors and complicated models for control design. Therefore, This work presents a trajectory control design method to suppress residual vibration in transfer systems without the need to directly measure vibration. The proposed method consists of two parts. First, the frequency characteristics of the controller, comprised of control elements with simple structures such as a notch filter and a low-pass filter, are shaped as needed to suppress vibration. Next, various parameters of the control elements are determined by solving an optimization problem with penalty terms expressed by the constraints of both the time and frequency domains. The proposed method is applied to a liquid container transfer system, with special consideration given to the suppression of sloshing (liquid vibration) as well as to the maintenance of a high-speed transfer on the container's three-dimensional transfer path. The obtained controller demonstrates good performance for all demands. The effectiveness of the control design method is shown by experiments.     

A poly-silicon TFT with a sub-5-nm thick channel for low-power gain cell memory in mobile applications

This work presents a gain-cell solution in which a novel ultrathin polysilicon film transistor provides the basis for dense and low-power embedded random-access memory (RAM). This is made possible by the new transistor's 2-nm-thick channel, which realizes a quantum-confinement effect that produces a low leakage current value of only 10/sup -19/ A at room temperature. The memory has the potential to solve the power and stability problems that static RAM (SRAM) is going to face in the very near future.     

An all DC-powered Josephson logic circuit

A novel DC-powered Josephson circuit is reported. An improved HUFFLE-type DC flip-flop with a parallel resistor, to prevent hang-up, is constructed by combinational circuits as well as sequential circuits. The basic device is a vertical type two-junction interferometer with only three-metal layers. The design rule is 2.5 μm. High junction-current density allows for a wide operating margin even with a low inductance load. Basic circuit function test elements have been completed. The DC flip-flop with excess gate current works as a GHz range VCO (voltage controlled oscillator) for internal clock generation. The speedup junction successfully accelerated the switching speed. The ring-oscillator showed a minimum gate delay of 11.3 ps     

Multichannel fiber ferrule for a stable laser-diode array module

We developed a multichannel fiber ferrule for a stable laser-diode array module. To apply YAG laser welding to parallel butt couple between the laser-diode and the single-mode fiber arrays, hermetically sealed and precisely aligned equi-interval fibers are required. We describe a V-grooved ceramic ferrule for embedding fibers. Fibers are fixed by soldering, using a flat ceramic lid and aligned with a 250 μm pitch. Our ferrule allowed a metallic, stem mounting laser-diode, to be fixed by YAG laser welding. All 30 samples tested have a leak rate of less than 1×10^-10 atm·cc/s. Optical coupling of fabricated modules was 9.7±0.2 dB and coupling loss change from 25°C to 115°C was within 0.5 dB     

HVEM study of crack-tip dislocations in Si crystals prepared by FIB and twin-blade cutting method

Crack-tip dislocations in silicon crystals have been examined by using high-voltage electron microscopy. Cracks were introduced by the Vickers indentation method at room temperature and the indented specimens were annealed at high temperatures to induce dislocations around crack tips under the presence of residual stress due to the indentation. A selected area around a crack tip was thinned by a focused ion beam (FIB) technique. Specimens were thinned in advance by a twin-blade cutting (TBC) method, which is a simple cutting process for saving FIB machine time. A combination of FIB and TBC can be a useful thinning procedure for the efficient preparation of transmission electron microscopy specimens. Characteristic dislocation structures were observed around the tip of a crack, aiding the elucidation of dislocation processes, which is essential to increase the fracture toughness of materials.     

Enhanced Optical Properties and Opaline Self‐Assembly of PPV Encapsulated in Mesoporous Silica Spheres

A new poly(p‐phenylenevinylene) (PPV) composite material has been developed by the incorporation of insoluble PPV polymer chains in the pores of monodisperse mesoporous silica spheres through an ion‐exchange and in situ polymerization method. The polymer distribution within the resultant colloidal particles is characterized by electron microscopy, energy dispersive X‐ray microanalysis, powder X‐ray diffraction, and nitrogen adsorption. It was found that the polymer was selectively incorporated into the mesopores of the silica host and was well distributed throughout the body of the particles. This confinement of the polymer influences the optical properties of the composite; these were examined by UV–vis and fluorescence spectroscopy and time‐correlated single‐photon counting. The results show a material that exhibits an extremely high fluorescence quantum yield (approaching 85%), and an improved resistance to oxidative photobleaching compared to PPV. These enhanced optical properties are further complemented by the overall processability of the colloidal material. In marked contrast to the insolubility of PPV, the material can be processed as a stable colloidal dispersion, and the individual composite spheres can be self‐assembled into opaline films using the vertical deposition method. The bandgap of the opal can be engineered to overlap with the emission band of the polymer, which has significant ramifications for lasing.     

Dynamic Power Integrity Control of ATE for Eliminating Overkills and Underkills in Device Testing

This paper proposes a power integrity control technique for dynamically controlling power supply voltage fluctuations for a device under test (DUT), and demonstrates its effectiveness for eliminating the overkills/underkills due to the difference of power supply impedance between an automatic test equipment (ATE) and a practical operating environment of the DUT. The proposed method injects compensation currents into the power supply nodes on the ATE system in a feed-forward manner such that the ATE power supply waveform matches with the one on the customer’s operating environment of the DUT. A method for calculating the compensation current is also described. Experimental results show that the proposed method can emulate the power supply voltage waveform under a customer’s operating condition and eliminate 95 % of overkills/underkills in the maximum operating frequency testing with 105 real silicon devices. Limitations and applications of the proposed method are also discussed.     

Demonstration of 100 Gbps optical packet switching using header processor based on 48-bit longest prefix matching

Wire-rate packet processing and its energy saving for over 100 Gbps speed of line are major issues to be resolved in optical packet switching (OPS) networks. For that purpose, we newly develop a high-speed, deterministic-latency electronic header processor based on longest prefix matching (LPM) for searching optical packet destination addresses (OP-DAs). This paper reports the successful experimental results of electronic header processing based on LPM search of up to 48 bits and optical switching of 100 Gbps optical packets by the use of the header processor. We demonstrate 48-bit LPM-capable optical packet switching. We also demonstrate IP packet transfer and 32-bit LPM-capable optical packet switching. In the latter demonstration, the 32-bit OP-DA of optical packets is directly copied from the 32-bit destination address of Internet Protocol version 4 (IPv4) packets. This result indicates that OPS networks can be deployed with electronic IP networks by the use of integrated network operation between OPS and IP networks.     

Residual stress evaluation in resin-molded IC chips using finite element analysis and piezoresistive gauges

The high residual stress in a resin-molded electronic package sometimes makes the electronic functions unstable. Therefore the residual stress in electronic packages, especially on the top surfaces of semiconductor chips, should be evaluated. The objective of this study is to present a simple method for evaluating residual stress in resin-molded semiconductor chips using a combination of experimental and numerical methods. The actual residual stress of the packaging process was measured by using test chips that included piezoresistive gauges. A linear thermoelastic finite element analysis was then carried out using a three-dimensional model. The finite element analysis was performed under a stress-free temperature determined by the temperature dependence of the residual stress, which was experimentally measured by using the piezoresistive test chips. The measured residual stress using the test chips agreed well with the results of the finite element analysis. It was therefore confirmed that the present evaluation method, combining experimental and numerical methods, is reliable and reasonable.