Influence of microstructure on the thermophysical properties of sintered SiC ceramics

The specific heat, thermal diffusivity and thermal conductivity of porous SiC ceramics sintered using two kinds of SiC powders (fine and coarse) have been investigated for sintering temperatures in the range 1700–2000 °C. Sintered SiC has a porous structure with approximately 30–40 vol.% porosity. Thermal diffusivity was measured by the laser flash method. The thermal diffusivities and thermal conductivities of sintered SiC ceramics increased with increasing sintering temperature. The specific heat decreased slightly with increasing sintering temperature. The thermal diffusivities and thermal conductivities of SiC sintered from coarse powder were higher than those of SiC sintered from fine powder. The thermal conductivity of samples increased markedly with increasing grain size.     

Effects of AlN layer thickness on magnetic anisotropy and transport phenomena of CoPt/AlN layered structure

The magnetic anisotropy was studied as a function of the AlN layer thickness in [AlN(x nm)/CoPt(2 nm)]5/AlN(x nm) layered structure (x is AlN layer thickness, and 5 is the number of multilayer series). The multilayered film was deposited by a sputtering apparatus equipped with two pairs of facing targets. It was found that, in the range of AlN layer thickness below 30 nm, CoPt/AlN multilayers transform from an enhanced in-plane magnetic anisotropy to perpendicular magnetic anisotropy (PMA) through thermal annealing in vacuum, with an optimized AlN thickness of 10 nm for strong PMA. However, beyond this thickness range, the PMA did not occur, and thermal annealing only results in magnetic isotropy in both parallel and perpendicular directions. The related structure analysis revealed that smooth interface and good texture of CoPt (111) make positive contributions to interface anisotropy energy and magnetocrystalline anisotropy energy for producing PMA in CoPt/AlN layered structure. In addition, the transport phenomena were also studied by using a four-probe method.     

All solid-state sheet battery using lithium inorganic solid electrolyte, thio-LISICON

All solid-state sheet lithium battery was developed using inorganic solid electrolyte, thio-LISICON (Li_3.25Ge_0.25P_0.75S₄), Li–Al anode, and Mo₆S₈ cathode materials, and the sheet manufacturing process was established. The new sheet-configuration was consisted of the cathode with the grid of current collector, electrolyte sheet with or without mechanical support, and aluminum/lithium composite sheet anode. A sheet battery with a dimension of 30 mm × 30 mm showed good charge–discharge characteristics without any capacity fading at a current of 0.1 mA.     

Temperature imaging of sub-millimeter-thick water using a near-infrared camera

This paper presents a method of imaging temperature distributions of sub-millimeter-thick water using a near-infrared camera and optical narrow-bandpass filter. The principle is based on the temperature dependence of the ν₁ + ν₃ absorption band of water. Temperature images are constructed by measuring the absorbance of water at the wavelength of 1412 nm through the filter for all pixels of the camera. From calibration measurements on 0.5-mm thick water at temperatures from 26.0 °C to 40.0 °C, the temperature coefficient was 6.3 × 10^?4 K^?1 and the standard deviation of absorbance was 1.9 × 10^?4. Thermal diffusion in 0.5-mm thick water caused by a thin heating wire was visualized with this method. The obtained images were verified against temperature distributions calculated by solving a two-dimensional thermal conduction model. This method would be useful for temperature measurement applications and control of aqueous solutions in microchips.     

Speciation of iodine in solid environmental samples by iodine K-edge XANES: application to soils and ferromanganese oxides

A method was developed for speciation of iodine in solid materials using X-ray absorption near-edge structure (XANES). This method was used to identify the iodine species (mainly inorganic iodine) in environmental samples. It was shown that the XANES spectra of iodide and iodate sorbed within solid materials can be simulated by the linear combination of the spectra of iodide and iodate ions in water. The distribution coefficient (Kd) between soil and water was obtained independently for iodide and iodate, based on iodine speciation both in the solid phase, by XANES, and in the aqueous phase, by HPLC-ICP-MS. It was found that the Kd of iodate is larger than that of iodide by a factor of more than six, showing the more soluble nature of iodide. It was suggested that iodate can form in soil even when iodide is injected into the soil-water system under conditions within the iodide-stable field of the Eh-pH diagram of iodine. This is caused by the much higher affinity of iodate for solid surfaces than iodide. In soil samples under various water saturation conditions, or various Eh conditions, the iodide fraction in water increases with decreasing Eh, which results in an increase in the dissolved total iodine fraction in soil water. The speciation method using XANES was also applied to iodine in a natural soil sample and marine ferromanganese oxides. It is suggested that iodine K-edge XANES is a promising tool for determining the iodide/iodate ratio in natural solid samples, which contributes to better understanding of the behavior of iodine at the Earth's surface.     

Improved performance of CdTe thin film solar cells through controlling the initial stage of the CdTe layer deposition by close-spaced sublimation

Control of the initial stage of the CdTe deposition was investigated by modifying the substrate and the source temperature profiles in close-spaced sublimation (CSS) process for improving the performance of CdTe thin film solar cells. In the modified temperature profile, the substrate temperature was increased with higher rate than that of the source temperature. By using the modified temperature profile, the conversion efficiency was improved as compared with the conventional temperature profile, and 15.3% efficiency (V_oc: 0.811 V, J_sc: 26.3 mA/cm², FF: 0.718, 1 cm², AM 1.5) was achieved.     

Photonic crystal line defect waveguide directional coupler

A three-port directional coupler based on photonic crystal line defect waveguides is demonstrated. The directional coupler has only a 21 μm long coupling region. Wavelength-selecting operation around 1.5 μm wavelength was confirmed     

Design methodology of embedded DRAM with virtual-socketarchitecture

This paper proposes the virtual-socket architecture in order to reduce the design turn-around time (TAT) of the embedded DRAM. The required memory density and the function of the embedded DRAM are system dependent. In the conventional design, the DRAM control circuitry with the DRAM memory array is handled as a hardware macro, resulting in the increase in design TAT. On the other hand, our proposed architecture provides the DRAM control circuitry as a software macro to take advantage of the automated tools based on synchronous circuit design. With array-generator technology, this architecture can achieve high quality and quick turn-around time (QTAT) of flexible embedded DRAM that is almost the same as the CMOS ASIC. We applied this virtual-socket architecture to the development of the 61-Mb synchronous DRAM core using 0.18-μm design rule and confirmed the high-speed operation, 166 MHz at CAS latency of two, and 180 MHz at that of three. The experimental results show that our proposed architecture can be applied to the development of the high-performance embedded DRAM with design QTAT     

A multigigabit DRAM technology with 6F2 open-bitlinecell, distributed overdriven sensing, and stacked-flash fuse

A multigigabit DRAM technology was developed that features a low-noise 6F² open-bitline cell with fully utilized edge arrays, distributed overdriven sensing for operation below 1 V, and a highly reliable post-packaging repair scheme using a stacked-flash fuse. This technology, which can be used to fabricate a 0,13-μm 180-mm² 1-Gb DRAM assembled in a 400-mil package, was verified using a 57.6-mm², 200-MHz array-cycle, 256-Mb test chip with 0.109-μm² cells     

日本非织造布工业的现状与前景

介绍了日本非织造布工业的现状 ,内容包括产量、生产工艺、应用领域和原材料的使用等。根据全球经济动态及日本在亚洲的商业地位制定了日本非织造布的发展目标