基于复合介质结构的圆波导高增益阵列天线研究

该文提出了一种基于复合介质结构覆层来提高圆波导天线阵列增益的新方法,利用数值分析方法对异向介质结构和基于异向介质结构圆波导高增益天线阵列的电磁特性进行了数值仿真研究,并将它们与传统圆波导天线阵列进行了比较。结果表明, 应用这种复合介质覆层结构可以有效地实现辐射能量的聚集,从而提高了天线阵列的增益,降低了天线阵列副瓣电平,有效地改善了天线阵列的辐射特性。     

某机载雷达发射机的设计

现代雷达对于发射机体积、重量、可靠性、可维护性和效率方面都有了非常严格的要求。为了适应这样的要求,介绍了某机载雷达发射机的设计方法,重点讨论了高压电源、发射机调制器以及检控电路的设计原则,将高效率的软开关高压电源和大脉宽高重复频率的调制器应用于发射机的设计中,有效地提高了雷达发射机的整体效率,并减小了发射机的体积、重量。通过系统设计提高了电真空雷达发射机的工作可靠性。并针对如何解决体积小、重量轻情况下的电磁兼容问题,低气压条件下的高压绝缘与散热矛盾作了较详细说明。这一设计方法已经成功地运用于某机载雷达发射机的工程设计当中,并且取得了很好的应用效果。     

一种改进的一致性扩散图像增强方法

一致性扩散是分析图像中定向结构的重要的预处理步骤,现有的一致性扩散图像增强方法难以识别图像中的弱边界。本文提出了一种改进的扩散方法,该方法构建了一种结合二阶方向导数信息的结构张量,能够精确分析图像中的复杂弱边界,同时与经典结构张量互为补充以检测图像的强边界。在此基础上设计了新的扩散张量,并采用了基于(加性分裂算子AOS)策略的数值计算方法。通过对比实验证明,该文算法的效果良好并具有很高的效率, 实现了在去除噪声的同时精确保护图像中的强弱边界。     

高功率激光冲击处理装置及其驱动冲击波实验研究

对实验研制的高功率、短脉冲强激光冲击处理装置进行了输出特性研究,其输出能量不稳定度和激光脉冲功率不稳定度分别为±3.8%和±6.5%。采用透镜列阵的焦斑均匀化系统使光强分布起伏度达到±12%。并利用新型压电传感器(PVDF压电传感器)对其引发的激光冲击波压力进行了实时测量。     

Single event soft error in advanced integrated circuit

As technology feature sizes decrease, single event upset (SEU), and single event transient (SET) dominate the radiation response of microcircuits. Multiple bit upset (MBU) (or multi cell upset) effects, digital single event transient (DSET) and analogue single event transient (ASET) caused serious problems for advanced integrated circuits (ICs) applied in a radiation environment and have become a pressing issue. To face this challenge, a lot of work has been put into the single event soft error mechanism and mitigation schemes. This paper presents a review of SEU and SET, including: a brief historical overview, which summarizes the historical development of the SEU and SET study since their first observation in the 1970's; effects prominent in advanced technology, which reviews the effects such as MBU, MSET as well as SET broadening and quenching with the influence of temperature, device structure etc.; the present understanding of single event soft error mechanisms, which review the basic mechanism of single event generation including various component of charge collection; and a discussion of various SEU and SET mitigation schemes divided as circuit hardening and layout hardening that could help the designer meet his goals.     

三维目标旋转畸变不变光学相关滤波器组的设计

研究了三维目标旋转畸变不变光学相关滤波器组的设计原理，完成了滤波器组参数的计算和编码，以及光学相关识别的计算机模拟。     

A Sensing and Stretchable Polymer-Dispersed Liquid Crystal Device Based on Spiderweb-Inspired Silver Nanowires-Micromesh Transparent Electrode

Polymer-dispersed liquid crystal (PDLC) devices are truly promising optical modulators for information display, smart window as well as intelligent photoelectronic applications due to their fast switching, large optical modulation as well as cost-effectiveness. However, realizing highly soft PDLC devices with sensing function remains a grand challenge because of the intrinsic brittleness of traditional transparent conductive electrodes. Here, inspired by spiderweb configuration, a novel type of silver nanowires (AgNWs) micromesh-based stretchable transparent conductive electrodes (STCEs) is developed to support the realization of soft PDLC device. Benefiting from the embedding design of AgNWs micromesh in polydimethylsiloxane (PDMS), the STCEs can maintain excellent electrical conductivity and transparency even in various extreme conditions such as bending, folding, twisting, stretching as well as multiple chemical corrosion. Further, STCEs with the embedded AgNWs micromesh endow the assembled PDLC device with excellent photoelectrical properties including rapid switching speed (<1 s), large optical modulation (69% at 600 nm), as well as robust mechanical stability (bending over 1000 cycles and stretching to 40%). Moreover, the device displays the pressure sensing function with high sensitivity in response to pressure stimulus. It is conceivable that AgNWs micromesh transparent electrodes will shape the next generation of related soft smart electronics.     

A 130 nm CMOS low-power SAR ADC for wide-band communication systems

This paper presents a low power 9-bit 80 MS/s SAR ADC with comparator-sharing technique in 130 nm CMOS process. Compared to the conventional SAR ADC, the sampling phase is removed to reach the full efficiency of the comparator. Thus the conversion rate increases by about 20% and its sampling time is relaxed. The design does not use any static components to achieve a widely scalable conversion rate with a constant FOM. The floorplan of the capacitor network is custom-designed to suppress the gain mismatch between the two DACs. The ＇set-and- down＇ switching procedure and a novel binary-search error compensation scheme are utilized to further speed up the SA bit-cycling operation. A very fast logic controller is proposed with a delay time of only 90 ps. At 1.2 V supply and 80 MS/s the ADC achieves an SNDR of 51.4 dB and consumes 1.86 mW, resulting in an FOM of 76.6 fJ/conversion-step. The ADC core occupies an active area of only 0.089 mm2.