Efficient Update of Indexes for Dynamically Changing Web Documents

Recent work on incremental crawling has enabled the indexed document collection of a search engine to be more synchronized with the changing World Wide Web. However, this synchronized collection is not immediately searchable, because the keyword index is rebuilt from scratch less frequently than the collection can be refreshed. An inverted index is usually used to index documents crawled from the web. Complete index rebuild at high frequency is expensive. Previous work on incremental inverted index updates have been restricted to adding and removing documents. Updating the inverted index for previously indexed documents that have changed has not been addressed. In this paper, we propose an efficient method to update the inverted index for previously indexed documents whose contents have changed. Our method uses the idea of landmarks together with the diff algorithm to significantly reduce the number of postings in the inverted index that need to be updated. Our experiments verify that our landmark-diff method results in significant savings in the number of update operations on the inverted index.     

Fabrication of Integrated Vertical Mirror Surfaces and Transparent Window for Packaging MEMS Devices

A scheme for creating metal-coated vertical mirrors in silicon, along with an integrated transparent package lid for assembling, packaging, and testing microelectromechanical systems (MEMS) devices is presented. Deep reaction ion etching (DRIE) method described here reduces the loading effect and maintains a uniform etch rate resulting in highly vertical structures. A novel self-masking lithography and liftoff process was developed to ensure that the vertical mirrors undergo uniform metallization while leaving a transparent window for optical probing. Front side of a Si wafer was shallow-etched using DRIE to define an eventual optical window. This surface was then anodically bonded to a Pyrex wafer. Backside Si was then patterned to define thin channels around the optical window. These channels were vertically etched using DRIE, after which the unattached portions of the window region were removed. Negative photoresist was spun on the remaining vertical structures and the stack was exposed from the Pyrex side using Si structures as a self-mask. Subsequent metal sputtering and liftoff results in the metallized top and mirror sidewalls while leaving a clear window. These integrated mirrors and lids are then bonded to the active MEMS mirrors. Various processes and results are illustrated with an example of packaged corner cube retroreflectors (CCRs)     

Device-Aware Yield-Centric Dual-Vt Design Under Parameter Variations in Nanoscale Technologies

Dual-V_t design technique has proven to be extremely effective in reducing subthreshold leakage in both active and standby mode of operation of a circuit in submicrometer technologies. However, aggressive scaling of technology results in different leakage components (subthreshold, gate and junction tunneling) to become significant portion of total power dissipation in CMOS circuits. High-V_t devices are expected to have high junction tunneling current (due to stronger halo doping) compared to low-V_t devices, which in the worst case can increase the total leakage in dual-V_t design. Moreover, process parameter variations (and in turn V_t variations) are expected to be significantly high in sub-50-nm technology regime, which can severely affect the yield. In this paper, we propose a device aware simultaneous sizing and dual-V_t design methodology that considers each component of leakage and the impact of process variation (on both delay and leakage power) to minimize the total leakage while ensuring a target yield. Our results show that conventional dual-V_t design can overestimate leakage savings by 36% while incurring 17% average yield loss in 50-nm predictive technology. The proposed scheme results in 10%-20% extra leakage power savings compared to conventional dual-V_t design, while ensuring target yield. This paper also shows that nonscalability of the present way of realizing high-V_t devices results in negligible power savings beyond 25-nm technology. Hence, different dual-V_t process options, such as metal gate work function engineering, are required to realize high-performance and low-leakage dual-V_t designs in future technologies.     

A Probabilistic and Decision Attitude Aggregation Operator for Intuitionistic Fuzzy Environment

In this paper, a new operator for aggregation of uncertain information under intuitionistic fuzzy environment is proposed. A novel approach is proposed for the selection of best alternative action in the face of the imprecise probabilities and the complex attitudinal character of the decision makers (DMs). This approach is distinguished with its capacity to accommodate the linguistic specification of probabilities as provided by human experts directly without the need to determine the fuzzy membership grades. The focus is to compute the net payoff for each alternative in the face of uncertain states of nature and DM's attitude. The proposed operator and the approach are illustrated through two real case studies.     

Aerosol characteristics over Delhi national capital region: a satellite view

Multi-sensor aerosol data sets are analysed to examine the aerosol characteristics over the Delhi national capital region. Both the Multiple-angle Imaging Spectroradiometer (MISR) and Moderate Resolution Imaging Spectroradiometer (MODIS) capture the seasonal cycle of aerosol optical depth (AOD) as observed by ground-based measurements. However, AOD from MISR shows a low bias relative to AOD from MODIS, which increases linearly at high AOD conditions. A large difference (by >25 W m^–2 per unit AOD) in the top-of-atmosphere direct radiative forcing efficiency derived from MODIS and MISR-retrieved AOD is observed during the winter and pre-monsoon seasons relative to the other seasons. The ubiquitous presence of dust (as indicated by non-spherical particle fraction to AOD and linear depolarization ratio values) is observed throughout the year. The aerosol layer is mostly confined to within 2 km of surface in the winter and post-monsoon seasons, while it expands beyond 6 km in the pre-monsoon and monsoon seasons. Columnar AOD is found to be highly sensitive to aerosol vertical distribution. The applicability of multi-sensor data sets and climatic implications are discussed.     

An analytical approach to dynamic crosstalk in coupled interconnects

This paper deals with waveform analysis, crosstalk peak and delay estimation of CMOS gate driven capacitively and inductively coupled interconnects. Simultaneously switching inputs for the coupled interconnects are considered. A transmission line-based coupled model of interconnect is used for analysis. Alpha-power Law model of MOS transistor is used to represent the transistors in CMOS driver. Peaks and delays at far-end of victim line are estimated for conditions when the inputs to the two coupled interconnects are switching in-phase and out-of-phase. The comparison of analytically obtained results with SPICE simulations show that the proposed model captures noise peak and their timing; 90% propagation delay; transition time delay and waveform shape with good accuracy, such as not more than 5% error in crosstalk peak estimation.     

Study of inductively coupled Cl2/BCl3 plasma process for high etch rate selective etching of via-holes in GaAs

We have investigated the selective etching of 50 μm diameter via-holes for etch depth >200 μm using 30 μm thick photo resist mask in Inductively Coupled Plasma system with Cl₂/BCl₃ chemistry. Resultant etch rate/etch profiles are studied as a function of ICP process parameters and photo resist mask sidewall profile. Etch yield and aspect ratio variation with process pressure and substrate bias is also investigated at constant ICP power. The etch yield of ICP process increased with pressure due to reactant limited etch mechanism and reached a maximum of ∼19 for 200 μm depth at 50 mTorr pressure, 950 W coil power, 80 W substrate bias with an etch rate ∼4.9 μm/min. Final aspect ratio of etched holes is increased with pressure from 1.02 at 20 mTorr to 1.38 at 40 mTorr respectively for fixed etch time and then decreased to 1.24 at 50 mTorr pressure. The resultant final etch profile and undercut is found to have a strong dependence on the initial slope of photo resist mask sidewall angle and its selectivity in the pressure range of 20-50mTorr.