A Novel Two-Step Channel-Prediction Technique for Supporting Adaptive Transmission in OFDM/FDD System

This paper introduces a novel channel-prediction technique for an orthogonal frequency-division multiplexing (OFDM)/frequency-division duplex (FDD) system to support an adaptive-modulation and coding (AMC) scheme over a rapidly time-varying multipath fading channel. Most channel-prediction techniques assume that there is no channel variation in the predefined time duration, e.g. the slot. As a result, those techniques cannot compensate for the degradation of packet-error-rate (PER) performance, resulting from the rapid channel variation over the slot duration. In this paper, we propose a novel two-step channel-prediction technique that considers the time-varying nature of a channel over the duration of interest. Simulation results show that the AMC scheme of the OFDM/FDD system utilizing the proposed channel-prediction technique can guarantee the target PER of 1% without any loss of system throughput compared with a case supported by a conventional channel prediction under ITU-R Veh A 30 km/h.     

Adaptive Bit-Interleaved Coded OFDM With Reduced Feedback Information

If the channel is static and is perfectly known to both the transmitter and the receiver, the water-filling technique with adaptive modulation is known to be optimal (Gallager, 1968). However, for orthogonal frequency-division multiplexing (OFDM) systems, this requires intensive traffic overheads for reporting channel state information on all subcarriers to the transmitter. In this paper, we consider an adaptive modulation and coding scheme for bit-interleaved coded OFDM with reduced feedback information satisfying a specified quality of service level. We propose a rate adaptation scheme, which utilizes the estimated bit error rate for supportable transmission rates. In this scheme, a user equipment chooses a modulation and coding scheme (MCS) level, which can provide the maximum spectral efficiency based on one OFDM symbol rather than on all subchannels. Then the user needs to send back only the selected MCS level index. The proposed scheme does not require the water-filling procedure, and the amount of the feedback information reduces to a single integer value irrespective of the number of subcarriers. Simulation results show that the proposed scheme can significantly reduce the system complexity while minimizing the performance loss compared to the optimum water-filling scheme.     

Direct extraction of an empirical temperature-dependent InGaP/GaAs HBT large-signal model

A new empirical InGaP/GaAs heterojunction bipolar transistor (HBT) large-signal model including self-heating effects is presented. The model accounts for the inherent temperature dependence of the device characteristics due to ambient-temperature variation as well as self-heating. The model is accompanied by a simple extraction process, which requires only dc current-voltage (I-V) and multibias-point small-signal S-parameter measurements. All the current-source model parameters, including the self-heating parameters, are directly extracted from measured forward I-V data at different ambient temperatures. The distributed base-collector capacitance and base resistance are extracted from measured S-parameters using a new technique. The extraction procedure is fast, accurate, and inherently minimizes the average squared-error between measured and modeled data, thereby eliminating the need for further optimization following parameter extraction. This modeling methodology is successfully applied to predict the dc, small-signal S-parameter, and output fundamental and harmonic power characteristics of an InGaP/GaAs HBT, over a wide range of temperatures.     

Molecular beam epitaxy growth of TmP/GaAs and transistor action inGaP/TmP/GaAs heterostructures

The growth of thulium phosphide (TmP) by molecular beam epitaxy (MBE) on GaAs substrate is reported. Good epilayer quality was demonstrated through X-ray diffraction (XRD), atomic force microscopy (AFM) and transmission electron microscopy (TEM) analysis. The closely lattice matched TmP layer was n-type with an electron concentration of 1.6×10²¹ cm^-3 and a room temperature mobility of 4.8 cm²V^-1s^-1. The Schottky barrier height determined from 1/capacitance² (1/C²) versus voltage (V) measurements is about 0.81 eV which agrees well with the value obtained through the current-voltage (I-V) measurements. In this work, we also report transistor action in a GaP/TmP/GaAs structure, for which chemical bonding techniques were employed. From I-V measurements, a common base current gain α≈0.55 at V_CB=0 was obtained at room temperature     

Low-cost broadband millimetre-wave array antenna using waveguide/microstrip feed network and slot pair

A low-cost broadband millimetre-wave planar 30/spl times/30 array antenna is presented. The antenna is fed by a microstrip feed network in the H-plane to decrease fabrication costs, and a waveguide feed network in the E-plane to reduce the feed line loss. The waveguide and microstrip feed network are coupled through the proposed slot pair. The slots are placed one quarter of a guided-wavelength distance apart, so that the reflected waves from the slots cancel each other. A conductive bar is laid above the slots to increase the coupling, which increases the antenna gain by about 1 dBi. The maximum gain is 30.5 dBi at 41.5 GHz. The measured bandwidth is as broad as 7.1%.     

Enhanced carrier mobility and photon-harvesting property by introducing Au nano-particles in bulk heterojunction photovoltaic cells

In this study, polymer solar cells (PSCs) doped with Au nanoparticles (Au NPs) were successfully fabricated to maximize the photon-harvesting properties on the photoactive layer. In addition, a conductivity-enhanced hybrid buffer layer was introduced to improve the photon absorption properties and effectively separate the generated charges by adding Au NPs and dimethylsulfoxide (DMSO) to the PH 500 as a buffer layer. The PSC performance was optimized with a 88% improvement over the conventional PSCs (photoactive area: 225 mm², power conversion efficiency (PCE): 3.2%) by the introduction to the buffer layer of Au NPs and DMSO at 10 wt% and 1.0 wt%, respectively, and with 15 wt% Au NP doping in the photoactive layer. The internal resistance was decreased due to the increased photocurrent caused by the localized surface plasmon resonance (LSPR) effect of the Au NPs in the photoactive layer and by the improvement of carrier mobility induced by the DMSO doping of the buffer layer. As a result, the series resistance (R_S) deceased from 42.3 to 19.7 Ω cm² while the shunt resistance (R_SH) increased from 339 to 487 Ω cm².     

Design of Rate-Compatible Block Turbo Code with a Low-Degree Generating Polynomial

This paper presents a Rate-Compatible Block Turbo Code (RC-BTC) with increased transmission capacity. The proposed RC-BTC uses a new algorithm called information augmenting scheme, and can achieve a higher code rate than conventional one. A new Error Location Finding (ELF) Decoding Algorithm is introduced to solve the decoding problem of the information augmenting scheme. As a result, a novel error-correcting capability of the BTC-applied Chase-ELF Hybrid Decoder, combining the previous Chase–Pyndiah algorithm and the proposed ELF algorithm, is demonstrated via Monte-Carlo simulation. In addition, the proposed code maximally increases the transmission capacity with the Chase-ELF Hybrid decoder using an information augmenting scheme.     

Miniaturized Flexible Electronic Systems with Wireless Power and Near‐Field Communication Capabilities

A class of thin, lightweight, flexible, near‐field communication (NFC) devices with ultraminiaturized format is introduced, and systematic investigations of the mechanics, radio frequency characteristics, and materials aspects associated with their optimized construction are presented. These systems allow advantages in mechanical strength, placement versatility, and minimized interfacial stresses compared to other NFC technologies and wearable electronics. Detailed experimental studies and theoretical modeling of the mechanical and electromagnetic properties of these systems establish understanding of the key design considerations. These concepts can apply to many other types of wireless communication systems including biosensors and electronic implants.     

Sliding Mode Observer Driver IC Integrated Gate Driver for Sensorless Speed Control of Wide Power Range of PMSMs

This work proposes a highly efficient sensorless motor driver chip for various permanent‐magnet synchronous motors (PMSMs) in a wide power range. The motor driver chip is composed of two important parts. The digital part is a sensorless controller consisting mainly of an angle estimation block and a speed control block. The analog part consists of a gate driver,which is able to sense the phase current of a motor. The sensorless algorithms adapted in this paper include a sliding mode observer (SMO) method that has high robust characteristics regarding parameter variations of PMSMs. Fabricated SMO chips detect back electromotive force signals. Furthermore, motor current–sensing blocks are included with a 10‐bit successive approximation analog‐to‐digital converter and various gain current amplifiers for proper sensorless operations. Through a fabricated SMO chip, we were able to demonstrate rated powers of 32 W, 200 W, and 1,500 W.     

A Fast Computation Method in Frequency Domain for Power Ground Plane Impedance Calculation Using the Mobius Transform

A new method to reduce the computation time in power/ground-plane analysis is proposed. The proposed method is based on an approximation of impedance in the frequency domain using Mobius transform. The power/ground plane impedance is transformed by Mobius transform and is more linear than the raw impedance, which ensures that a simple approximation is possible. After the approximation, an inverse Mobius transform is applied to predict the power/ground plane impedance. This method displays the high speed of computing with good accuracy. In the case of impedance calculation for a 17.78 cm times 10.16 cm printed circuit board (PCB) board, the proposed method has shown to be 12 times faster than conventional methods. This method can be applied to the analysis and design of power/ground-plane where complex computation is needed.