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991.
采用GaAs pin二极管,完成了15~40GHz的单刀单掷开关单片的设计、制作.GaAs pin二极管SPST开关单片具有低插损、高隔离、高功率的特点,在15~20GHz带内插损0.6dB,驻波优于1.5,隔离度大于40dB;在20~40GHz带内插损小于1.1dB,驻波优于1.35,隔离度大于35dB.pin二极管SPST开关单片的1dB功率压缩点P-1大于2W.GaAs pin二极管开关单片采用MOCVD生长的GaAs 纵向pin二极管材料结构,76mm GaAs圆片工艺加工制作.  相似文献   
992.
The reliability of low-K flip-chip packaging has become a critical issue owing to the low strength and poor adhesion qualities of the low-K dielectric material when compared with that of SiO2 or fluorinated silicate glass (FSG). The underfill must protect the solder bumps and the low-K chip from cracking and delamination. However, the material properties of underfill are contrary to those required for preventing solder bumps and low-K chip from cracking and delamination. This study describes the systematic methodologies for how to specify the adequate underfill materials for low-K flip-chip packaging. The structure of the test vehicle is seven copper layers with a low-K dielectric constant value of 2.7-2.9, produced by the chemical vapor deposition (CVD) process. Initially, the adhesion and the flow test of the underfill were evaluated, and then the low-K chip and the bumps stress were determined using the finite element method. The preliminary screened underfill candidates were acquired by means of the underfill adhesion and flow test, and balancing the low-K chip and the bumps stress simulation results. Next, the low-K chips were assembled with these preliminary screened underfills. All the flip-chip packaging specimens underwent the reliability test in order to evaluate the material properties of the underfill affecting the flip-chip packaging stress. In addition, the failed samples are subjected to failure analysis to verify the failure mechanism. The results of this study indicate that, of the underfill materials investigated, those with a glass transition temperature (Tg) and a Young’s modulus of approximately 70–80 °C and 8–10 GPa, respectively, are optimum for low-K flip-chip packaging with eutectic solder bumps.  相似文献   
993.
A polyaniline/polystyrene composite film with a lotus‐leaf‐like structure is prepared via a simple electrospinning method. The film shows stable superhydrophobicity and conductivity, even in many corrosive solutions, such as acidic or basic solutions over a wide pH range, and also in oxidizing solutions. The special surface composition and morphology are the two important aspects that induce such unusual properties. The polystyrene content can strongly influence the morphology of the composite films, which thus display different superhydrophobicities and conductivities.  相似文献   
994.
The synthesis of three‐dimensionally ordered, transparent gold‐nanocrystal (NC)/silica superlattice thin films using the self‐assembly (by spin‐coating) of water‐soluble gold nanocrystal micelles and soluble silica is reported by Fan and co‐workers on p. 891. The robust, 3D NC/silica superlattice films are of interest for the development of collective optical and electronic phenomena, and, importantly, for the integration of NC arrays into device architectures. Nanocrystals and their ordered arrays hold many important applications in fields such as catalysis, surface‐enhanced Raman spectroscopy based sensors, memory storage, and electronic and optical nanodevices. Herein, a simple and general method to synthesize ordered, three‐dimensional, transparent gold nanocrystal/silica superlattice thin films by self‐assembly of gold nanocrystal micelles with silica or organosilsesquioxane by spin‐coating is reported. The self‐assembly process is conducted under acidic sol–gel conditions (ca. pH 2), ensuring spin‐solution homogeneity and stability and facilitating the formation of ordered and transparent gold nanocrystal/silica films. The monodisperse nanocrystals are organized within inorganic host matrices as a face‐centered cubic mesostructure, and characterized by transmission electron spectroscopy and X‐ray diffraction.  相似文献   
995.
Position location (PL) of a UE requesting E-911 services should be provided by wireless communication service providers, according to the Federal Communications Commission (FCC) regulations. Raising pilot power fraction can improve the system locatability, while it may also cause pilot pollution and increase interference to UEs in neighboring cells. In this letter we find the optimal pilot power allocation subject to coverage and locatability constraints. The results have shown that with new localization techniques such as idle period downlink (IPDL) and cumulative virtual blanking (CVB), the coverage and locatability constraints can be satisfied without requiring long integration time and large pilot power fraction.  相似文献   
996.
The output power and conversion efficiency of thermoelectric modules (TEMs) are mainly determined by their material properties, i.e., Seebeck coefficient, electrical resistivity, and thermal conductivity. In practical applications, due to the influence of the harsh environment, the mechanical properties of TEMs should also be considered. Using the finite-element analysis (FEA) model in ANSYS software, we present the thermal stress distribution of a TEM based on the anisotropic mechanical properties and thermoelectric properties of hot-pressed materials. By analyzing the possibilities of damage along the cleavage plane of Bi2Te3-based thermoelectric materials and by optimizing the structure parameters, a TEM with better mechanical performance is obtained. Thus, a direction for improving the thermal stress resistance of TEMs is presented.  相似文献   
997.
CANDECOMP/PARAFAC (CP) analysis is an extension of low-rank matrix decomposition to higher-way arrays, which are also referred to as tensors. CP extends and unifies several array signal processing tools and has found applications ranging from multidimensional harmonic retrieval and angle-carrier estimation to blind multiuser detection. The uniqueness of CP decomposition is not fully understood yet, despite its theoretical and practical significance. Toward this end, we first revisit Kruskal's permutation lemma, which is a cornerstone result in the area, using an accessible basic linear algebra and induction approach. The new proof highlights the nature and limits of the identification process. We then derive two equivalent necessary and sufficient uniqueness conditions for the case where one of the component matrices involved in the decomposition is full column rank. These new conditions explain a curious example provided recently in a previous paper by Sidiropoulos, who showed that Kruskal's condition is in general sufficient but not necessary for uniqueness and that uniqueness depends on the particular joint pattern of zeros in the (possibly pretransformed) component matrices. As another interesting application of the permutation lemma, we derive a similar necessary and sufficient condition for unique bilinear factorization under constant modulus (CM) constraints, thus providing an interesting link to (and unification with) CP.  相似文献   
998.
本文研究了在Si(111)衬底上生长GaN外延层的方法。相比于直接在AlN缓冲层上生长GaN外延层,引入GaN过渡层显著地提高了外延层的晶体质量并降低了外延层的裂纹密度。使用X射线双晶衍射仪、光学显微镜以及在位监测曲线分析了GaN过渡层对外延层的晶体质量以及裂纹密度的影响。实验发现,直接在AlN缓冲层上生长外延层,晶体质量较差, X射线(0002)面半高宽最优值为0.686°,引入GaN过渡层后,通过调整生长条件,控制岛的长大与合并的过程,从而控制三维生长到二维生长过渡的过程,外延层的晶体质量明显提高, (0002)面半高宽降低为0.206°,并且裂纹明显减少。研究结果证明,通过生长合适厚度的GaN过渡层,可以得到高质量、无裂纹的GaN外延层。  相似文献   
999.
There lie geometric constraints between neighboring frames in multiview video sequences. The geometric constraints are valuable for reducing spatial and temporal redundancy in multiview video coding (MVC). In this paper, we propose a new fast motion estimation algorithm based on the loop–epipolar constraint which combines loop and epipolar constraints. A practical search technique is designed according to the characteristics of the loop–epipolar constraint. Experimental results show that the proposed algorithm is efficient for sequences under different multiview camera setups.  相似文献   
1000.
江金光  李森 《半导体学报》2014,35(11):115010-7
A single lithium-ion battery protection circuit with high reliability and low power consumption is proposed.The protection circuit has high reliability because the voltage and current of the battery are controlled in a safe range.The protection circuit can immediately activate a protective function when the voltage and current of the battery are beyond the safe range.In order to reduce the circuit’s power consumption,a sleep state control circuit is developed.Additionally,the output frequency of the ring oscillation can be adjusted continuously and precisely by the charging capacitors and the constant-current source.The proposed protection circuit is fabricated in a 0.5 m mixed-signal CMOS process.The measured reference voltage is 1.19 V,the overvoltage is 4.2 V and the undervoltage is 2.2 V.The total power is about 9 W.  相似文献   
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