A 16 MHz, 59.2 ppm/°C CMOS DLL-Assisted VCO with Improved Frequency Stability Towards Single Chip Wireless IOT

A 16 MHz, highly stable voltage controlled oscillator (VCO) is reported in this paper. The proposed VCO consists of three cross-coupled RC stages, and is fully compatible with standard CMOS process. A positively biased PN junction with negative temperature coefficient is incorporated in the design to compensate frequency drift. In addition, a delay locked loop (DLL) directly following the VCO is utilized to further improve the output stability caused by temperature variations. The designed circuit was implemented using CMOS 0.18 μm technology, and was validated through experiments. Measurement results show that the DLL-assisted VCO output variation across the 25~120 °C temperature range is less than 0.56 %, corresponding to 59.2 ppm/°C. It also shows that the output standard deviation of the DLL-assisted VCO is only 6.816 KHz, ~ 16.6 % better compared with the same VCO without DLL’s assistance.     

Built-in redundancy analysis for memory yield improvement

With the advance of VLSI technology, the capacity and density of memories is rapidly growing. The yield improvement and testing issues have become the most critical challenges for memory manufacturing. Conventionally, redundancies are applied so that the faulty cells can be repairable. Redundancy analysis using external memory testers is becoming inefficient as the chip density continues to grow, especially for the system chip with large embedded memories. This paper presents three redundancy analysis algorithms which can be implemented on-chip. Among them, two are based on the local-bitmap idea: the local repair-most approach is efficient for a general spare architecture, and the local optimization approach has the best repair rate. The essential spare pivoting technique is proposed to reduce the control complexity. Furthermore, a simulator has been developed for evaluating the repair efficiency of different algorithms. It is also used for determining certain important parameters in redundancy design. The redundancy analysis circuit can easily be integrated with the built-in self-test circuit.     

透射电镜电子染色方法的改良

为提高透射电镜生物样品超薄切片的染色效率,在传统染色方法基础上进行改良,使用自制染色装置,在较短时间内完成大批生物样品超薄切片的电子染色。与传统方法相比较省时省药,减少污染机率,电镜观察的超微结构清晰,反差较好。     

MAC Protocols for Distributed Cooperative Communication Networks

Distributed cooperative networks use the cooperation among nodes to fulfill network resource sharing. However,designing an efficient Media Access Control (MAC) protocol is a key issue for the distributed cooperative network. Based on the principle of MAC-layer cooperation,this paper discusses problems and challenges for MAC protocol design in the distributed cooperative network. Through the analysis of typical cooperative MAC protocols and their performance,this paper concludes that only a reasonable MAC pr...     

基于Metasys系统车间空调机组自动化

为了实现我厂空调系统节能降耗、方便管理、达到工艺要求、提高经济效益等目标,我们选用Johnson Controls(美国江森自控)之Metasys系统对厂区车间的空调进行自控设计。     

集成电路测试系统软件的设计及实现

本文主要展示了集成电路测试系统软件的基本功能及其核心部分的实现方法。先介绍了集成电路测试系统硬件的建模方法,然后在硬件建模的基础上讲述了集成电路软件的结构及设计方法。着重介绍了流程图测试程序转化为文本测试程序的方法以及对文本测试程序的编译方法。用户只需要根据测试流程编写流程图即可以实现测试程序的编写,实现对IC的测试,提高了开发效率。该软件系统具有和硬件系统低耦合性,当向集成电路测试系统添加删改硬件时,不需要修改太多的软件内容即可以正常工作,通用性较好。     

La2O3和Nb2O5掺杂对SrTiO3氧敏特性及半导化影响

研究Nb和La双施主掺杂对SrTiO₃陶瓷氧敏性能及半导化的影响,采用固相法合成了La、Nb复合掺杂的钛酸锶Sr_1-xLa_xTi_1-xNb_xO₃(x=0,0.001,0.01,0.03,0.05,0.1)钙钛矿复合系氧化物。研究不同的La,Nb掺杂量对氧敏材料灵敏度、电导率的影响,对合成氧敏元件在高温下的氧敏性能、电导性进行了测定。结果表明,双施主掺杂不仅可促进SrTiO₃陶瓷半导化,而且对氧敏元件灵敏度有重要影响,x=0.3 时呈现出理想的氧敏特性。     

米勒体系的结构演变及其理念解析

针对公民科学素质测量,米勒体系经历了不断的发展。从最初的三维结构,发展为实践中的二维结构,甚至转向对科学知识测量单一维度的倚重,反映出米勒体系的理念内涵——传统的科学观以及基于公众缺失的公众理解科学理念。     

低功耗低误码率的传感器网络节点芯片数字基带设计

本文针对无线传感器网络节点片上系统特点和需求,研究一种低功耗、高性能、低误码率的数字基带(Easibaseband),提出了一种复用加法器和乘法器的设计方法,实现了匹配滤波器,可节省硬件资源并提高系统性能;提出了一种自适应门限的自动增益控制方法,可配合软硬件协同的工作方式,节省接收机的功耗;提出了采用自适应门限的施密特触发器方式进行信号相位判决的方法,降低了解调误码率.本设计在Xilinx的Spartan-3E FPGA上验证并实现,测试结果表明,本收发机的数据传输率可达到111kb/s并支持ISM2.4GHz频段的射频芯片,比传统的并行滤波器节省了5/6的硬件资源,比不采用自动增益控制节省了10.8%的接收机功耗,在信噪比13dB时,误码率在10-4以下,远低于WiseNET的接收误码率.