A unified diode model for circuit simulation

A new commercially available diode model is described. This unified model is capable of simulating the widest range of diode technologies of any presently available. The emphasis of this paper is on describing the model's extensive features and flexibility in the different domains of operation and is of particular interest in power applications     

Soft commutation in capacitive idling converters

The capacitive idling converters derived from the Cuk, SEPIC, Zeta, and flyback topologies allow soft commutation of power switches without the need for additional circuitry, making it possible to increase the switching frequency while maintaining high efficiency     

Pipelining and bypassing in a VLIW processor

This short note describes issues involved in the bypassing mechanism for a very long instruction word (VLIW) processor and its relation to the pipeline structure of the processor. The authors first describe the pipeline structure of their processor and analyze its performance and compare it to typical RISC-style pipeline structures given the context of a processor with multiple functional units. Next they study the performance effects of various bypassing schemes in terms of their effectiveness in resolving pipeline data hazards and their effect on the processor cycle time     

E-kernel: an embedding kernel on the IBM victor V256 multiprocessorfor program mapping and network reconfiguration

We present the design of E-kernel, an embedding kernel on the Victor V256 message-passing partitionable multiprocessor, developed for the support of program mapping and network reconfiguration. E-kernel supports the embedding of a new network topology onto Victor's 2D mesh and also the embedding of a task graph onto the 2D mesh network or the reconfigured network. In the current implementation, the reconfigured network can be a line or an even-size ring, and the task graphs meshes or tori of a variety of dimensions and shapes or graphs with similar topologies. For application programs having these task graph topologies and that are designed according to the communication model of E-kernel, they can be run without any change on partitions connected by the 2D mesh, line, or ring. Further, E-kernel attempts the communication optimization of these programs on the different networks automatically, thus making both the network topology and the communication optimization attempt completely transparent to the application programs. Many of the embeddings used in E-kernel are optimal or asymptotically optimal (with respect to minimum dilation cost). The implementation of E-kernel translated some of the many theoretical results in graph embeddings into practical tools for program mapping and network reconfiguration in a parallel system. E-kernel is functional on Victor V256. Measurements of E-kernel's performance on V256 are also included     

Large-deviation inequalities for parameter estimators in stochastic systems

Translated from Kibernetika i Sistemnyi Analiz, No. 2, pp. 95–112, March–April, 1994.     

Algebra of algorithms and Kaluzhnin's graphschemas

This research was supported under project No. 6.02.02/128-93 as part of the state scientific-technical program on future information technologies and systems by the Ukrainian State Committee, of Science and Technology.     

Effect of Freezer Programs on Real-Time Storage Results of Dissolution Profiles

Carstensen and Rhodes¹ have suggested that when, in stability programs, assays cannot be performed immediately after the protocol-designated storage time, then freezing them until such a time when assays can be performed would be a reasonable manner to retain the protocol schedule. They caution, however, that such a procedure may not be valid for dissolution data. The article to follow deals with real-time data showing that such a process is feasible for Nalidixic Acid tablets (and presumably for other tablets as well), and that, furthermore, the dissolution pattern would seem to be “frozen” as well.