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991.
An evolutionary algorithm is used to find three sets of binary sequences of length 49-100 suitable for the synchronization of digital communication systems. Optimization of the sets are done by taking into consideration the type of preamble used in data frames and the phase-lock mechanism of the communication system. The preamble is assumed to be either a pseudonoise (PN) sequence or a sequence of 1s. There may or may not be phase ambiguity in detection. With this categorization, the first set of binary sequences is optimized with respect to aperiodic autocorrelation which corresponds to the random (PN) preamble without phase ambiguity case. The second and third sets are optimized with respect to a modified aperiodic autocorrelation for different figures of merit corresponding to the predetermined preamble (sequence of 1s) with and without phase ambiguity cases.  相似文献   
992.
We demonstrate the first programmable group-delay module based on polarization switching. With a unique binary tuning mechanism, the device can generate any differential group delay value from -45 to +45 ps with a resolution of 1.40 ps, or any true-time-delay value from 0 to 45 ps with a resolution of 0.7 ps. The delay varying speeds for both applications are under 1 ms and can be as fast as 0.1 ms. We evaluate both the dynamic and static performances of the device while paying special attention to its dynamic figures of merit for polarization-mode dispersion emulation and compensation applications. Our experiment shows that the device exhibits a negligible transient-effect induced power penalty (<0.2 dB) in a 10-Gb/s nonreturn-to-zero system.  相似文献   
993.
994.
The magnitude of the V/sub T/ instability in conventional MOSFETs and MOS capacitors with SiO/sub 2//HfO/sub 2/ dual-layer gate dielectrics is shown to depend strongly on the details of the measurement sequence used. By applying time-resolved measurements (capacitance-time traces and charge-pumping measurements), it is demonstrated that this behavior is caused by the fast charging and discharging of preexisting defects near the SiO/sub 2//HfO/sub 2/ interface and in the bulk of the HfO/sub 2/ layer. Based on these results, a simple defect model is proposed that can explain the complex behavior of the V/sub T/ instability in terms of structural defects as follows. 1) A defect band in the HfO/sub 2/ layer is located in energy above the Si conduction band edge. 2) The defect band shifts rapidly in energy with respect to the Fermi level in the Si substrate as the gate bias is varied. 3) The rapid energy shifts allows for efficient charging and discharging of the defects near the SiO/sub 2//HfO/sub 2/ interface by tunneling.  相似文献   
995.
Test structures intended for performance verification of transmission line pulse (TLP) systems have been designed and tested. They consist of simple resistors in either copper or silicide clad polysilicon. The copper structures proved unsuitable due to excess heating and melting of any reasonable geometry. The silicide clad polysilicon proved more successful. A simple model of resistive heating accounts for observed nonlinearity in the structures under high current stress. The availability of a verification structure on wafer ensures the proper performance of the full measurement system, including contact to the wafer and the pad structure, ensuring valid TLP measurements.  相似文献   
996.
A validation of the delamination analysis models developed in a companion paper is provided through comparisons of predictions with finite‐element and elasticity solutions. The models are applied to the analysis of composite compression specimens reinforced with end tabs. An elasticity solution for the gage section of the specimens is developed. A comparison of the characteristic roots shows that the predictions of the models include the material and geometric parameters that control the behavior, and the roots corresponding to the basic stretching and bending modes are accurately predicted. The stress distribution at the interface between tabs and specimen is in good agreement with a finite‐element simulation. The interlaminar shear and peel stresses show an exponential increase with a maximum intensity at the free edges of the tabs. The behavior of previously tested specimens is explained; and practical guidelines for specimen design are provided to avoid unwanted extraneous modes of failure. The influence of the deformation modes associated with each model is investigated. An assessment of the accuracy and level of complexity is presented.  相似文献   
997.
The crystal structure of CaMgGeO4 is described. CaMgGeO4, Mr = 200.9, orthorhombic, Pnam, A = 11.285(5) Å, B = 5.016(2) Å, C = 6.435(2) Å, V = 364.36 Å3, Dx = 3.664 Mg/m3.λ(MoKa = 0.71069 Å, F(000) = 384, room temperature, final R = 0.045 for 1752 observed reflections. The structure is isomorphous with CaMgSiO4 (monticellite).  相似文献   
998.
The authors have fabricated n-p-n GaAs/AlGaAs heterojunction bipolar transistors (HBTs) with base doping graded exponentially from 5×1019 cm-3 at the emitter edge to 5×1018 cm-3 at the collector edge. The built-in field due to the exponentially graded doping profile significantly reduces base transit time, despite bandgap narrowing associated with high base doping. Compared to devices with the same base thickness and uniform base doping of 1×1019 cm-3 , the cutoff frequency is increased from 22 to 31 GHz and maximum frequency of oscillation is increased from 40 to 58 GHz. Exponentially graded base doping also results ill consistently higher common-emitter current gain than uniform base doping, even though the Gummel number is twice as high and the base resistance is reduced by 40%  相似文献   
999.
Voltage switching induced by long-wavelength infrared light from a CO2 laser was observed using a double-barrier resonant tunneling diode (RTD) biased in the bistable region and the intersubband transition (IT) between the quantum confined states. Possible optoelectronic and all-optical switching applications involving hysteresis are proposed and discussed  相似文献   
1000.
Methods and tools for detecting nondeterminacy in programs for shared-memory multiprocessors are discussed. The approach described divides the debugging chore into two phases. The first phase uses tools that automatically detect nondeterminacy to debug synchronization errors, assuming it is decided at the outset to make the parallel program determinate. At the end of this phase, it is known that the program is determinate, that timing differences will not affect results, and the debugging sessions are repeatable. In the second phase, an interactive break-point debugger is used to find arithmetic and logical errors. The proposed tools fall into two groups: those that statically analyze the source program and those that analyze an execution trace of the program  相似文献   
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