An automatic procedure for the synthesis and optimization of very low-frequency Gm–C integrators

Fully integrated low frequency filters are critical cells that should be carefully designed in order to avoid excessive area occupation. In this work we propose an automatic procedure capable of optimizing the design of G_m?CC integrators, which constitute the basis of a wide class of G_m?CC filters. The optimization target is minimizing the cell area with constraints on input range and low frequency noise. Lower and upper bounds can be fixed to most quantities and design parameters in order to avoid solutions that are not compatible with the physical limitations of the process. The program has been developed within the MATLAB^? platform, exploiting the optimization toolbox. The effect of several important design parameters on the optimization of low frequency integrators has been investigated using the proposed routine. The strong interaction between noise and low frequency constraints has been demonstrated, showing the impressive impact of strict noise specifications on the occupied area. The actual effectiveness of parameters such as the current division factor or approaches such as flicker noise rejection by means of chopper modulation has been investigated. Examples of integrator synthesis, performed using the proposed procedure configured with the parameters of a commercial CMOS process, are presented. The consistence between the characteristics of the cells and the initial specifications has been checked using electrical simulations showing a maximum discrepancy with the initial specifications of nearly 80%. A semi-manual method to refine the synthesized cells and improve the accuracy is proposed.     

Familial lead poisoning from contaminated wine

Three members of a family were found be suffering from lead poisoning of nonindustrial origin, the causative agent being the home-produced wine left to ferment in a glazed earthenware vat. The clinical and neurophysiological features are discussed in the light of similar cases in the literature. Correct diagnosis and early treatment of nonindustrial lead polyneuropathy are often extremely difficult because of the elusive nature of the exposure.     

阿维迪钢厂的技术产品优势

1992年,在克日莫那的阿维迪钢厂新建了一条以生产薄板为基础的板材紧凑式生产线,这是欧洲第一、世界第二条薄板生产线.该生产线主要生产高质量钢和特殊钢.数据表明平均每浇次浇11炉钢,56%以上的产品规格都小于2mm厚,经连轧轧成1250mm宽1mm厚的薄板材.可以生产大部分钢种,例如低、中、高碳钢(0.75%),1.2mm的高强度低合金钢,硼钢,耐候钢,合金钢,包晶钢和双相钢等.明年,准备采取措施在一座115t电炉和单流最大宽度为1300mm的生产线上达到100万t的产量.引进铁素体轧制,发展热轧来生产更薄规格的钢以及多相铁素体-马氏体、铁素体-贝氏体钢.和其它薄板生产技术相比,AST(Arvedi Steel Technology阿维迪厂技术)有如下7项优势薄板液芯压下技术,能使板坯中心晶粒细化、温度分布均匀;在线低速轧制(低拉速),从而使中间坯凸度＜1%;板坯厚度方向上的反向温度分布;感应加热炉精确、灵活的温度控制制度;稳定的终轧温度;根据最终薄带的厚度和温度来预设一个恒定的板坯精轧速度;经过克日莫那炉的无头轧制.优良的产品是经过先进的、控制精确的二次、三次冶金生产的.本文将着重陈述阿维迪钢厂的实践要点.并将叙述一些变换成本、高附加值产品及其经济结果.阿维迪有2条年产250万t的生产线,用来生产宽度接近于1600～1800mm的钢种.实践证明,AST的效益归功于它的极高的拉速以及直接无头轧制的思想.目前,AST将上一条高拉速(7.5m/min)的带有精轧的铸轧生产线.阿维迪的ECR的工艺(无头轧制)能够生产0.7mm厚的所有冷轧能生产的同种规格的产品,该工艺还能够生产IF钢(汽车板)、多相钢、薄带甚至有高延伸率和抗拉强度等特殊性能的钢,用来满足汽车工业的需要.克日莫那的阿维迪钢厂用高生产力、低成本生产各种质量的钢种,因此经济效益很好.阿维迪是这项技术的拥有者,准备以阿维迪的名义来购买掉这项技术,其中包括钢液准备、薄带制作以及薄带精整技术.     

Strain sensing fabric for hand posture and gesture monitoring.

In this paper, we report on a new technology used to implement strain sensors to be integrated in usual garments. A particular conductive mixture based on commercial products is realized and directly spread over a piece of fabric, which shows, after the treatment, piezoresistive properties, i.e., a change in resistance when it is strained. This property is exploited to realize sensorized garments such as gloves, leotards, and seat covers capable of reconstructing and monitoring body shape, posture, and gesture. In general, this technology is a good candidate for adherent wearable systems with excellent mechanical coupling with body surface. Here, we mainly focused on a sensorized glove able to detect posture and movements of the fingers. It could be used in several fields of application. We report on experimental results of a sensorized glove used as movements recorder for rehabilitation therapies and medicine. Furthermore, we describe a dedicated methodology used to read the output sensors which allowed to avoid using metallic wires for the connections. The price to be paid for all these advantages is a nonlinear electric response of the fabric sensor and a too long settling time, that in principle, make these sensors not suitable for real-time applications. Here we propose a hardware and computational solution to overcome this limitation.     

A VLIW processor with reconfigurable instruction set for embedded applications

This paper describes a new architecture for embedded reconfigurable computing, based on a very-long instruction word (VLIW) processor enhanced with an additional run-time configurable datapath. The reconfigurable unit is tightly coupled with the processor, featuring an application-specific instruction-set extension. Mapping computation intensive algorithmic portions on the reconfigurable unit allows a more efficient elaboration, thus leading to an improvement in both timing performance and power consumption. A test chip has been implemented in a standard 0.18-/spl mu/m CMOS technology. The test of a signal processing algorithmic benchmark showed speedups ranging from 4.3/spl times/ to 13.5/spl times/ and energy consumption reduced up to 92%.     

Wavelength Conversion Technologies

This paper reports a review of the different technologies used for wavelength conversion in wavelength-division multiplexed networks. The strengths and the weaknesses of the competing technologies, including optoelectronic wavelength conversion, four-wave mixing, difference frequency generation, cross-gain and cross-phase modulation in semiconductor optical amplifiers, are stressed with regard to conversion speed, transparency and regeneration of the converted signal.     

Multi-agent quality of experience control

International Journal of Control, Automation and Systems - In the framework of the Future Internet, the aim of the Quality of Experience (QoE) Control functionalities is to track the personalized...     

Single p-type/intrinsic/n-type silicon nanowires as nanoscale avalanche photodetectors

We report the controlled synthesis of axial modulation-doped p-type/intrinsic/n-type (p-i-n) silicon nanowires with uniform diameters and single-crystal structures. The p-i-n nanowires were grown in three sequential steps: in the presence of diborane for the p-type region, in the absence of chemical dopant sources for the middle segment, and in the presence of phosphine for the n-type region. The p-i-n nanowires were structurally characterized by transmission electron microscopy, and the spatially resolved electrical properties of individual nanowires were determined by electrostatic force and scanning gate microscopies. Temperature-dependent current-voltage measurements recorded from individual p-i-n devices show an increase in the breakdown voltage with temperature, characteristic of band-to-band impact ionization, or avalanche breakdown. Spatially resolved photocurrent measurements show that the largest photocurrent is generated at the intrinsic region located between the electrode contacts, with multiplication factors in excess of ca. 30, and demonstrate that single p-i-n nanowires function as avalanche photodiodes. Electron- and hole-initiated avalanche gain measurements performed by localized photoexcitation of the p-type and n-type regions yield multiplication factors of ca. 100 and 20, respectively. These results demonstrate the significant potential of single p-i-n nanowires as nanoscale avalanche photodetectors and open possible opportunities for studying impact ionization of electrons and holes within quasi-one-dimensional semiconductor systems.