Influence of pressure dependence of the yield criterion on the strain-rate-intensity factor

The strain-rate-intensity factor is the coefficient of the principal singular term in an expansion of the equivalent strain rate in a series in the vicinity of maximum-friction surfaces. Its value controls the physical processes in a thin material layer near the frictional interfaces. The objective of the present paper is to study the effects of the pressure dependence of the yield criterion on the strain-rate-intensity factor. The results can be used to develop new methods for predicting the evolution of material properties in the vicinity of surfaces with high friction in metal-forming processes.     

Effect of epitaxial realignment on the leakage behavior of arsenic-implanted,as-deposited polycrystalline Si-on-single crystal Si diodes

When dopants are indiffused from a heavily implanted polycrystalline silicon film deposited on a silicon substrate, high thermal budget annealing can cause the interfacial “native” oxide at the polycrystalline silicon-single crystal silicon interface to break up into oxide clusters, causing epitaxial realignment of the polycrystalline silicon layer with respect to the silicon substrate. Anomalous transient enhanced diffusion occurs during epitaxial realignment and this has adverse effects on the leakage characteristics of the shallow junctions formed in the silicon substrate using this technique. The degradation in the leakage current is mainly due to increased generation-recombination in the depletion region because of defect injection from the interface.     

Superresolution frequency estimation by alternating notchperiodogram

A novel periodogram-based maximum-likelihood algorithm is proposed for a frequency estimation problem. It is called an alternating notch-periodogram algorithm (ANPA), since the original multidimensional maximum likelihood problem is decomposed into a sequence of much simpler one-dimensional problems of finding the peaks of notch periodograms. The ANPA achieves superresolution and a very low SNR threshold and can be computed and implemented in several efficient ways. First, with FFT and a concurrent Gram-Schmidt procedure using Schur's recursions, the notch periodogram can be computed without any costly eigendecomposition and matrix inversion. This approach can further lead to a mapping of the notch periodogram onto a VLSI architecture consisting mainly of a highly pipelined notch processor and two FFT processors. Second, without degrading the excellent performance of ANPA, the notch periodogram can be simplified and approximated to provide further computational reduction and implementational simplicity     

The base current degradation of poly-emitter BJTs under AC stress

A simple model for the analysis of the ac stress effect in poly-emitter bipolar transistors is presented. Apart from the reverse-bias induced hot-carrier effects, the forward-bias recovery effect is a key factor under ac stress, it obviously suppresses the base current degradation of the device which is caused during the reverse-bias periods. In this work, we derived the relationship between the excess base current and the stress time for different ac stress conditions. This model is verified with experimental results.<>     

Cluster-based blind nonlinear-channel estimation

A cluster-based maximum-likelihood sequence estimator (MLSE) for nonlinear channels was described, which consists of a clustering network and an MLSE implemented by the Viterbi algorithm. The cluster-based MLSE can be used for digital communication through nonlinear finite-length channels because channel mapping estimation is used instead of channel estimation in the conventional MLSE. The clustering network of the cluster-based MLSE, which estimates the channel mapping between the signal input vectors and the noiseless channel outputs, is a supervised network and requires a training sequence. We propose a blind channel mapping estimator to estimate the channel mapping without using the training sequence. The blind channel mapping estimator has a clustering block and a mapping block. The clustering block estimates the channel outputs, which represent the channel mapping, subject to an unknown permutation operation because no training sequence is utilized. That permutation operation is resolved by the mapping block, and therefore, the channel mapping is obtained. Introducing the blind channel mapping estimator into the cluster-based MLSE, a blind cluster-based MLSE for nonlinear channels can be done. Computer simulations of the blind channel mapping estimator and the blind MLSE for nonlinear channels are presented     

A novel propagation modeling for microcellular communications inurban environments

A novel method for microcellular communications to predict propagation characteristics is presented in this paper. It takes into account multiple reflections among walls, ground, vehicles, as well as the transmission/reflection due to groups of trees. Although these are three-dimensional (3-D) problems, we can combine two-dimensional (2-D) ray tracing and simple 3-D geometric considerations to solve them in a very efficient way. We have investigated the propagation loss versus size, number, and locations of vehicles and groups of trees on a safe island. Our results show that the radio wave propagation exhibits severe fast fading, attenuation, and blockage due to reflection, transmission, and shadowing, respectively     

Failure mechanism and SPICE modeling of AlGaAs/GaAs HBT long-term current instability

The long-term current instability of AlGaAs/GaAs heterojunction bipolar transistor (HBT) is studied, and the physical mechanism contributing to such a behavior is investigated. Based on this, a model capable of predicting the HBT long-term current drift and mean time to failure (MTTF) is developed. In addition, such a model is implemented into SPICE circuit simulator, thus allowing the simulation of HBT circuits subjected to an electrical and thermal stress condition.     

An improved model for four-terminal junction field-effecttransistors

The junction field-effect transistor (JFET) has isolated top- and bottom-gate terminals and therefore is useful for signal mixing applications. Existing models for the four-terminal JFET often have the same form as the three-terminal JFET model, however, in which only a single pinch-off voltage is used to describe the current-voltage characteristics. In this paper, a more general four-terminal JFET model is developed. Two different pinch-off voltages are involved in the improved model to account more comprehensively for the effects of both depletion regions associated with the top- and bottom-gate junctions. Results simulated from a device simulator are also included in support of the model     

Optimization of on-chip ESD protection structures for minimal parasitic capacitance

Diodes are key components in on-chip electrostatic discharge (ESD) protection design. As the operating frequency of the microchip being protected against the ESD continues to increase, the parasitic capacitance associated with the diodes in the ESD structure starts to impose problems for RF operation. This paper presents a systematic approach to optimize the diode structure for minimal parasitic capacitance based on the requirements of breakdown voltage and heat dissipation. Device simulator Atlas with mix-mode simulation capability is calibrated against measurement data and used to carry out the optimization. An optimized diode structure with a parasitic capacitance of less than 30 fF at an operating frequency of 10 GHz and ESD charging voltage of 1 kV has been suggested. Furthermore, a case study to implement and optimize the ESD protection structure based on an existing 0.13-μm CMOS technology has been presented and verified.