SET/CMOS hybrid process and multiband filtering circuits

We have developed an integration technology for the single electron transistor (SET)/CMOS hybrid systems. SET and CMOS transistors can be optimized without any possible degradation due to mixing dissimilar devices by adopting just one extra mask step for the separate gate oxidation (SGOX). We have confirmed that discrete devices show ideal characteristics required for the SET/CMOS hybrid systems. An SET shows obvious Coulomb oscillations with a 200-mV period and CMOS transistors show high voltage gain. Based on the hybrid process, new hybrid circuits, called periodic multiband filters, are proposed and successfully implemented. The new filter is designed to perform a filtering operation according to the periodic multiple blocking bands of which a period is originated from the SET. Such a novel function was implemented efficiently with a few transistors by making full use of the periodic nature of SET characteristics.     

W-band divide-by-3 frequency divider using 0.1 /spl mu/m InAlAs/InGaAs metamorphic HEMT technology

A W-band divide-by-3 frequency divider with wide bandwidth and low power dissipation is presented using harmonic injection-locking technique. A cascode FET is employed for a self-oscillating second-harmonic mixer which is injection-locked by third-harmonic input to obtain the division order of three. The fabricated frequency divider using 0.1 /spl mu/m GaAs metamorphic HEMT technology shows superior performance such as large bandwidth of 6.1 GHz around 83.1 GHz (7.3%) under small DC power consumption of 12 mW.     

Monolithic SiGe Up‐/Down‐Conversion Mixers with Active Baluns

The purpose of this paper is to describe the implementation of monolithically matching circuits, interface circuits, and RF core circuits to the same substrate. We designed and fabricated on‐chip 1 to 6 GHz up‐conversion and 1 to 8 GHz down‐conversion mixers using a 0.8 µm SiGe hetero‐junction bipolar transistor (HBT) process technology. To fabricate a SiGe HBT, we used a reduced pressure chemical vapor deposition (RPCVD) system to grow a base epitaxial layer, and we adopted local oxidation of silicon (LOCOS) isolation to separate the device terminals. An up‐conversion mixer was implemented on‐chip using an intermediate frequency (IF) matching circuit, local oscillator (LO)/radio frequency (RF) wideband matching circuits, LO/IF input balun circuits, and an RF output balun circuit. The measured results of the fabricated up‐conversion mixer show a positive power conversion gain from 1 to 6 GHz and a bandwidth of about 4.5 GHz. Also, the down‐conversion mixer was implemented on‐chip using LO/RF wideband matching circuits, LO/RF input balun circuits, and an IF output balun circuit. The measured results of the fabricated down‐conversion mixer show a positive power conversion gain from 1 to 8 GHz and a bandwidth of about 4.5 GHz.     

Novel configurations of planar multilayer magic-T usingmicrostrip-slotline transitions

Novel configurations of microwave planar magic-T suitable for microwave integrated circuits (MICs) and monolithic MICs are described. They consist of microstrip and slotline T-junctions coupled by microstrip-slotline transitions. Since via-hole processing is not encountered, they are especially applicable to multilayer MICs. Derived equivalent network models are used efficiently for the design of the corresponding multilayer microstrip magic-T. Measured data and numerical simulations showing good amplitude and phase characteristics over an octave operating bandwidth validate the proposed configurations of planar magic-T     

Thermally Controlled,Patterned Graphene Transfer Printing for Transparent and Wearable Electronic/Optoelectronic System

Graphene has been highlighted as a platform material in transparent electronics and optoelectronics, including flexible and stretchable ones, due to its unique properties such as optical transparency, mechanical softness, ultrathin thickness, and high carrier mobility. Despite huge research efforts for graphene‐based electronic/optoelectronic devices, there are remaining challenges in terms of their seamless integration, such as the high‐quality contact formation, precise alignment of micrometer‐scale patterns, and control of interfacial‐adhesion/local‐resistance. Here, a thermally controlled transfer printing technique that allows multiple patterned‐graphene transfers at desired locations is presented. Using the thermal‐expansion mismatch between the viscoelastic sacrificial layer and the elastic stamp, a “heating and cooling” process precisely positions patterned graphene layers on various substrates, including graphene prepatterns, hydrophilic surfaces, and superhydrophobic surfaces, with high transfer yields. A detailed theoretical analysis of underlying physics/mechanics of this approach is also described. The proposed transfer printing successfully integrates graphene‐based stretchable sensors, actuators, light‐emitting diodes, and other electronics in one platform, paving the way toward transparent and wearable multifunctional electronic systems.     

Fully Programmable Memory BIST for Commodity DRAMs

To accomplish a high‐speed test on low‐speed automatic test equipment (ATE), a new instruction‐based fully programmable memory built‐in self‐test (BIST) is proposed. The proposed memory BIST generates a high‐speed internal clock signal by multiplying an external low‐speed clock signal from an ATE by a clock multiplier embedded in a DRAM. For maximum programmability and small area overhead, the proposed memory BIST stores the unique sets of instructions and corresponding test sequences that are implicit within the test algorithms that it receives from an external ATE. The proposed memory BIST is managed by an external ATE on‐the‐fly to perform complicated and hard‐to‐implement functions, such as loop operations and refresh‐interrupts. Therefore, the proposed memory BIST has a simple hardware structure compared to conventional memory BIST schemes. The proposed memory BIST is a practical test solution for reducing the overall test cost for the mass production of commodity DDRx SDRAMs.     

Absorption of NOx in packed column (II)

An absorption efficiency of packed column removing nitrogen oxides with water and NaOH solution under atmospheric pressure was studied. The efficiency and the acidity produced by absorption of NO, were measured in a packed column. The model developed that was based on the mass-transfer information for packed column and absorption mechanism accompanying the chemical reaction was compared with experimental results. Predictions using the model presented by the previous paper (part 1) was shown well to agree with from the experimental results (part II). The efficiency of NO_x, absorption is largely dependent on the height of packing material and the partial pressure of NO_x in the feed gas. The efficiency of NO_x absorption decreases with the increase of the acidity produced by recycling of water as a scrubber liquid. For the recycle mode with an aqueous NaOH solution as a scrubber liquid, NO_x absorption efficiency is shown to be constant until all of the C_OH- in the scrubber liquid are converted into C_H+.