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51.
卷帘式彩色LCoS(硅上液晶)显示必须展现其快速和高对比度两项特性。这些要求推动了成像核心的液晶和光学系统的设计选择。我们发现,输入方向必须沿着入射偏振方向,且须选择一种补偿性的45TN0效应。高对比度需要对界面反射提出严格的要求。线栅PBS能实现高的对比度且能简化系统结构。在关注上述问题的同时,我们曾报告过,在视屏上的时序对比度为800:1。采用90TN0效应,其对比度可以更高,但会有一些光效损失。采用这种效应所测时序对比度为2000:1。  相似文献   
52.
Discotic liquid‐crystalline (LC) physical gels have been prepared by combining the self‐assembled fibers of a low‐molecular‐weight gelator and semiconducting LC triphenylene derivatives. The hole mobilities of the discotic LC physical gels measured by a time‐of‐flight method become higher than those of LC triphenylenes alone. The introduction of the finely dispersed networks of the gelator in the hexagonal columnar phases may affect the molecular dynamics of the liquid crystals, resulting in the enhancement of hole transporting behavior in the LC gel state.  相似文献   
53.
The 35 nm gate length CMOS devices with oxynitride gate dielectric and Ni salicide have been fabricated to study the feasibility of higher performance operation. Nitrogen concentration in gate oxynitride was optimized to reduce gate current I/sub g/ and to prevent boron penetration in the pFET. The thermal budget in the middle of the line (MOL) process was reduced enough to realize shallower junction depth in the S/D extension regions and to suppress gate poly-Si depletion. Finally, the current drives of 676 /spl mu/A//spl mu/m in nFET and 272 /spl mu/A//spl mu/m in pFET at V/sub dd/=0.85 V (at I/sub off/=100 nA//spl mu/m) were achieved and they are the best values for 35 nm gate length CMOS reported to date.  相似文献   
54.
A method to obtain a nano-area electron diffraction pattern in transmission electron microscopy (TEM) was proposed, based on three-dimensional (3D)) image formation theory. This method allows us to reconstruct an electron diffraction pattern from a 3D Fourier spectrum of high-resolution through-focus images. As a test case, an electron diffraction pattern from a tilted Si single crystal was reconstructed using the proposed method and compared with the conventional selected-area electron diffraction pattern. The intensity distribution of the reconstructed electron diffraction pattern was confirmed to be qualitatively equal to that of the selected-area electron diffraction pattern, though the degree of the equivalency between these patterns reduces at the high frequency region and the reproducibility of the intensity degrades when the number of images used in the image processing was decreased. By selecting areas in a reconstructed exit wave field, some electron diffraction patterns were obtained from the nano-areas without the influence of spherical aberration.  相似文献   
55.
This paper describes an 80-Gb/s optoelectronic delayed flip-flop (D-FF) IC that uses resonant tunneling diodes (RTDs) and a uni-traveling-carrier photodiode (UTC-PD). A circuit design that considers the AC currents passing through RTDs and UTC-PD is key to boosting circuit operation speed. A monolithically fabricated IC operated at 80 Gb/s with a low power dissipation of 7.68 mW. The operation speed of 80 Gb/s is the highest among all reported flip-flops. To clarify the maximum operation speed, we analyze the factors limiting circuit speed. Although the bandwidth of UTC-PD limits the maximum speed of operation to 80 Gb/s at present, the circuit has the potential to offer 100-Gb/s-class operation  相似文献   
56.
Photovoltaic modules must generally be connected in series in order to produce the voltage required to efficiently drive an inverter. However, if even a very small part of photovoltaic module (PV module) is prevented from receiving light, the generation power of the PV module is decreased disproportionately. This greater than expected decrease occurs because PV modules which do not receive adequate light cannot operate on the normal operating point, but rather operate as loads. As a result, the total power from the PV modules is decreased if even only a small part of the PV modules are shaded. In the present paper, a novel circuit, referred to as the generation control circuit (GCC), which enables maximum power to be obtained from all of the PV modules even if some of the modules are prevented from receiving light. The proposed circuit enables the individual PV modules to operate effectively at the maximum power point tracking, irrespective of the series connected PV module system. In addition, the total generated power is shown experimentally to increase for the experimental set-up used in the present study  相似文献   
57.
A hybrid optical fibre amplifier is described that consists of a fluoride-based thulium-doped fibre amplifier and a silica-based erbium-doped fibre amplifier connected in a cascade. The amplifier has a gain of more than 25 dB and a noise figure of less than 9 dB over a wide wavelength region of 1458-1540 nm.  相似文献   
58.
A multi-level NAND Flash memory cell, using a new Side-WAll Transfer-Transistor (SWATT) structure, has been developed for a high performance and low bit cost Flash EEPROM. With the SWATT cell, a relatively wide threshold voltage (Vth) distribution of about 1.1 V is sufficient for a 4-level memory cell in contrast to a narrow 0.6 V distribution that is required for a conventional 4-level NAND cell. The key technology that allows this wide Vth distribution is the Transfer Transistor which is located at the side wall of the Shallow Trench Isolation (STI) region and is connected in parallel with the floating gate transistor. During read, the Transfer Transistors of the unselected cells (connected in series with the selected cell) function as pass transistors. So, even if the Vth of the unselected floating gate transistor is higher than the control gate voltage, the unselected cell will be in the ON state. As a result, the Vth distribution of the floating gate transistor can be wider and the programming can be faster because the number of program/verify cycles can be reduced. Furthermore, the SWATT cell results in a very small cell size of 0.57 μm2 for a 0.35 μm rule. Thus, the SWATT cell combines a small cell size with a multi-level scheme to realize a very low bit cost. This paper describes the process technology and the device performance of the SWATT cell, which can be used to realize NAND EEPROM's of 512 Mbit and beyond  相似文献   
59.
A 32-b 500-MHz 4-1-1-1 operation 4-Mb pipeline burst cache SRAM has been developed. In order to achieve both high bandwidth operation and short latency operation, we developed the following technologies: 1) a prefetched pipeline-burst scheme with double late-write buffers, 2) gate size reduction and a bit-line equalization by source resetting, 3) point-to-point bidirectional coding I/O's to reduce bus noise and power consumption, and 4) a three-level metal 0.25-μm CMOS process technology with six transistor memory cells  相似文献   
60.
Temperature-dependent signal gain characteristics at signal wavelengths of 1.536 and 1.552 μm in Er3+-doped optical fibers with a temperature range of -40 to 80°C are reported for 0.98 and 1.48 μm pumping. The temperature dependences of signal gain strongly depend on fiber length, pump wavelength, and signal wavelength. The fiber length at which signal gain temperature insensitivity occurs is found for the amplification of a 0.98-μm-pump-1.536-μm-signal, a 0.98-μm-pump-1.552-μm-signal, and a 1.48-μm-pump-1.536-μm-signal. It is confirmed theoretically that the temperature dependences result from linear changes in the fluorescence, and absorption cross sections at the signal and pump wavelengths, and a shift in the effective pump wavelength  相似文献   
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