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排序方式: 共有9139条查询结果,搜索用时 49 毫秒
41.
A 3.3-V 16-Mb nonvolatile memory having operation virtually identical to DRAM with package pin compatibility has been developed. Read and write operations are fully DRAM compatible except for a longer RAS precharge time after write. Fast random access time of 63 ns with the NAND flash memory cell is achieved by using a hierarchical row decoder scheme and a unique folded bit-line architecture which also allows bit-by-bit program verify and inhibit operation. Fast page mode with a column address access time of 21 ns is achieved by sensing and latching 4 k cells simultaneously. To allow byte alterability, nonvolatile restore operation with self-contained erase is developed. Self-contained erase is word-line based, and increased cell disturb due to the word-line based erase is relaxed by adding a boosted bit-line scheme to a conventional self-boosting technique. The device is fabricated in a 0.5-μm triple-well, p-substrate CMOS process using two-metal and three-poly interconnect layers. A resulting die size is 86.6 mm2, and the effective cell size including the overhead of string select transistors is 2.0 μm2  相似文献   
42.
The occasional power-on latch-up phenomenon of DRAM modules with a data bus shared by multiple DRAM chips on different modules was investigated and the circuit techniques for latch-up prevention were presented. Through HSPICE simulations and measurements, the latch-up triggering source was identified-to be the excessive voltage drop at the n-well pick-up of the CMOS transmission gate of read data latch circuit due to the short-circuit current which flows when the bus contention occurs during power-on. By extracting the HSPICE Gummel-Poon model parameters of the parasitic bipolar transistors of DRAM chips from the measured I-V and C-V data, HSPICE simulations were performed for the power-on latch-up phenomenon of DRAM chips. Good agreements were achieved between measured and simulated voltage waveforms. In order to prevent the power-on latch-up even when the control signals (RAS, GAS) do not track with the power supply, two circuit techniques were presented to solve the problem. One is to replace the CMOS transmission gate by a CMOS tristate inverter in the DRAM chip design and the other is to start the CAS-BEPORE-RAS (CBR) refresh cycle during power-on and thus disable all the Dout buffers of DRAM chips during the initial power-on period  相似文献   
43.
Phase-space data processing is receiving increased attention because or its potential for furnishing new discriminants relating to classification and identification of targets and other scattering environments. Primary emphasis has been on time-frequency processing because of its impact on transient, especially wideband, short-pulse excitations. Here, we investigate the windowed Fourier transform, the wavelet transform, and model based superresolution algorithms within the context of a fully quantified and calibrated test problem investigated by us previously: two-dimensional (2-D) short-pulse plane wave scattering by a finite periodic array of perfectly conducting coplanar flat strips. Because the forward problem has been fully calibrated and parametrized, some quantitative measures can be assigned with respect to the tradeoffs of these time-frequency algorithms, yielding tentative performance assessments of the tested processing algorithms  相似文献   
44.
2/spl times/2 electrooptic switches consisting of a pair of asymmetric Y junctions and Mach-Zehnder interferometer have been demonstrated in polymeric waveguides. The switching voltage is 15 V with 1.5 cm long electrode for TM polarized light at 1.3 /spl mu/m. When the branching angle of the asymmetric Y junction is 0.2/spl deg/, crosstalk of -27 to -22 dB are obtained for both input arms. The measured insertion loss by the lens coupling is about 9-10 dB.  相似文献   
45.
The bit error rate (BER) analysis of a direct-sequence code-division multiple-access (DS-CDMA) cellular system over a Rayleigh-fading channel often results in complicated expressions even though the Gaussian approximation is applied. A combined probability density function (pdf) approach for the forward link and a mean-method technique for the reverse link are proposed to significantly reduce the computational complexity. The simplified BER expressions are derived and yield accurate results  相似文献   
46.
Jin  I.S. Whang  K.C. Cho  K. Ahn  J.Y. Oh  H.S. 《Electronics letters》1997,33(20):1668-1669
An algorithm for mapping between information bits and channel symbols in multiple trellis-coded modulation (MTCM) codes with M-PSK signal sets is proposed. The core of the algorithm assigns information bits with a Hamming distance in proportion to the sum of the Euclidean distance to each M-PSK symbol. The analytical results show that the additional gains from applying the algorithm can be achieved with little or no loss  相似文献   
47.
Integrated-optic polarization controlling devices such as polarizers, polarization splitters, and polarization converters, are proposed and demonstrated in nonlinear optic polymers. Poling-induced birefringence in electro-optic polymers is exploited to fabricate the devices. The polymeric waveguide polarizers show low excess losses, and extinction ratios of 20.7 dB and 17.1 dB for TM-pass and TE-pass polarizers, respectively. The polymeric waveguide polarization splitters exhibit TE-TM mode splittings with crosstalk of 14.2 dB and 10.1 dB for TM and TE mode splittings, respectively. The polymeric waveguide polarization converters show successful TE/TM polarization mode conversion with conversion efficiencies of higher than 30 dB. The device employs poling-induced waveguides which have slowly rotating azimuth angle of optic axis along the light propagation direction. The novel polarization converter is insensitive to wavelength and easier to fabricate than the other polarization converters containing periodic structures.  相似文献   
48.
We present the design and fabrication of a 60 GHz medium power amplifier monolithic microwave integrated circuit with excellent gain‐flatness for a 60 GHz radio‐over‐fiber system. The circuit has a 4‐stage structure using microstrip coupled lines instead of metal‐insulator‐metal capacitors for unconditional stability of the amplifier and yield enhancement. The gains of each stage of the amplifier are modified to provide broadband characteristics of input/output matching for the first and fourth stages and to achieve higher gains for the second and third stages to improve the gain‐flatness of the amplifier for wideband.  相似文献   
49.
50.
In this study, high‐performance ionic soft actuators are developed for the first time using collectively exhaustive boron and sulfur co‐doped porous carbon electrodes (BS‐COF‐Cs), derived from thiophene‐based boronate‐linked covalent organic framework (T‐COF) as a template. The one‐electron deficiency of boron compared to carbon leads to the generation of hole charge carriers, while sulfur, owing to its high electron density, creates electron carriers in BS‐COF‐C electrodes. This antagonistic functionality of BS‐COF‐C electrodes assists the charge‐transfer rate, leading to fast charge separation in the developed ionic soft actuator under alternating current input signals. Furthermore, the hierarchical porosity, high surface area, and synergistic effect of co‐doping of the BS‐COF‐Cs play crucial roles in offering effective interaction of BS‐COF‐Cs with poly(3,4‐ethylenedioxythiophene) polystyrene sulfonate (PEDOT:PSS), leading to the generation of high electro‐chemo‐mechanical performance of the corresponding composite electrodes. Finally, the developed ionic soft actuator based on the BS‐COF‐C electrode exhibits large bending strain (0.62%), excellent durability (90% retention for 6 hours under operation), and 2.7 times higher bending displacement than PEDOT:PSS under extremely low harmonic input of 0.5 V. This study reveals that the antagonistic functionality of heteroatom co‐doped electrodes plays a crucial role in accelerating the actuation performance of ionic artificial muscles.  相似文献   
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