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21.
Senez V. Collard D. Ferreira P. Baccus B. 《Electron Devices, IEEE Transactions on》1996,43(5):720-731
Local Oxidation of Silicon (LOCOS) remains the common isolation technology for mass-production of integrated circuits. The work reported in this paper contributes to the improvement of the numerical modeling of the LOCOS process. A physical two-dimensional (2-D) modeling of the thermal oxidation of silicon has been developed based on the explicit treatment of the reaction expansion. The originality of this modeling is to propose a general solution taking into account of the silicon deformation, incorporating the viscoelastic behaviour of oxide and nitride and, particularly, giving a complete calibration of the stress-dependent parameters. The prediction capabilities are demonstrated by the calculations of oxide shapes and oxidation-induced stresses in a silicon substrate for very advanced isolation techniques 相似文献
22.
S. Zhang X. Liao L. Raniero E. Fortunato Y. Xu G. Kong H. guas I. Ferreira R. Martins 《Solar Energy Materials & Solar Cells》2006,90(18-19):3001-3008
Diphasic silicon films (nc-Si/a-Si:H) have been prepared by a new regime of plasma enhanced chemical vapour deposition in the region adjacent of phase transition from amorphous to microcrystalline state. Comparing to the conventional amorphous silicon (a-Si:H), the nc-Si/a-Si:H has higher photoconductivity (σph), better stability, and a broader light spectral response range in the longer wavelength range. It can be found from Raman spectra that there is a notable improvement in the medium range order. The blue shift for the stretching mode and red shift for the wagging mode in the IR spectra also show the variation of the microstructure. By using this kind of film as intrinsic layer, a p–i–n junction solar cell was prepared with the initial efficiency of 8.51% and a stabilized efficiency of 8.01% (AM1.5, 100 mw/cm2) at room temperature. 相似文献
23.
L. Raniero N. Martins P. Canhola S. Zhang S. Pereira I. Ferreira E. Fortunato R. Martins 《Solar Energy Materials & Solar Cells》2005,87(1-4):349
The aim of this work is to present data concerning the optimization of performances of a large area amorphous silicon p–i–n solar cell (30×40 cm2) deposited by plasma enhanced chemical vapour deposition (PECVD) at 27.12 MHz. In this work the solar cell was split into small areas of 0.126 cm2, aiming to study the device performance uniformity, where emphasis was put on the role of the n-layer thickness. The solar cells were studied through the spectral response behaviour in the 400–750 nm range as well as by the behaviour of the AC impedance. Solar cells with fill factor of 0.58, open circuit voltage of 0.83 V, short circuit current density of 17.14 mA/cm2 and an efficiency of 8% were obtained at growth rates higher than 0.3 nm/s. 相似文献
24.
Radun A.V. Ferreira C.A. Richter E. 《Industry Applications, IEEE Transactions on》1998,34(5):1026-1034
Measured data and simulation results for a two-channel experimental switched-reluctance-motor (SRM)-based aircraft engine starter/generator system are presented. The two channels of the system provide power to two separate and independent loads. The results presented document the performance capability of this system with both channels operating simultaneously. Both measured and predicted system performance are presented and compared. In addition, operating characteristics that are unique to this SRM-based system are described. Of particular interest are the interactions between the two separate channels when one channel experiences a load transient and the other channel does not. The source of channel interactions is described, and measured data is provided. The issue of clearing load faults is also addressed. Design results for adding this capability to the experimental system are described 相似文献
25.
Boundary scan test,test methodology,and fault modeling 总被引:1,自引:0,他引:1
The test technique called boundary scan test (BST) offers new opportunities in testing but confronts users with new problems too. The implementation of BST in a chip has become an IEEE standard and users on board level are the next group to begin thinking about using the new possibilities. This article addresses some of the questions about changes in board-level testing and fault diagnosis. The fault model itself is also affected by using BST. Trivial items are extended with more sophisticated details in order to complete the fault model. Finally, BST appears to be a test technique that offers a high degree of detectability on board level, but for diagnosis, some additional effort has to be made. 相似文献
26.
Patrick N Okoh Roman P Kubiczek Placid C Njoku Grace T Iyeghe 《Journal of the science of food and agriculture》1989,49(3):271-279
Grains of two sorghum (Sorghum vulgare L) varieties were germinated at room temperature for 2, 4 and 6 days. Germination resulted in an increase in protein content due to dry matter loss; this rose with increasing time of germination. The absolute amount of tannin was unchanged until the fourth day of germination but decreased markedly by the sixth day. Fractionation of the grain protein of one variety showed that there was a large increase in the albumin-globulin fraction (rich in lysine) and a decrease in the kafirin and cross-linked kafirin fraction (low in lysine) as a result of germination. Although these changes resulted in a more than 30% increase in lysine content on the fourth and sixth days of germination, a substantial loss in dry matter occurred when germination was continued up to 6 days. When 14-day-old Hubbard chicks were fed a diet containing about 59% malted sorghum supplemented with lysine, they showed better (P < 0.05) weight gain and efficiency of feed conversion than those on malted sorghum without lysine supplementation. However, malting reduced the amount of lysine needed to supplement the diet from 0.25% for unmalted sorghum to 0.18% for malted sorghum. 相似文献
27.
Sérgio Duarte David Navalho Heitor Ferreira Nuno Preguiça 《Mobile Networks and Applications》2013,18(3):357-372
Participatory Sensing is a new computing paradigm that aims to turn personal mobile devices into advanced mobile sensing networks. For popular applications, we can expect a huge number of users to both contribute with sensor data and request information from the system. In such scenario, scalability of data processing becomes a major issue. In this paper, we present a system for supporting participatory sensing applications that leverages cluster or cloud infrastructures to provide a scalable data processing infrastructure. We propose and evaluate three strategies for data processing in this architecture. 相似文献
28.
Emken JL Harkema SJ Beres-Jones JA Ferreira CK Reinkensmeyer DJ 《IEEE transactions on bio-medical engineering》2008,55(1):322-334
Robotic gait training is an emerging technique for retraining walking ability following spinal cord injury (SCI). A key challenge in this training is determining an appropriate stepping trajectory and level of assistance for each patient, since patients have a wide range of sizes and impairment levels. Here, we demonstrate how a lightweight yet powerful robot can record subject-specific, trainer-induced leg trajectories during manually assisted stepping, then immediately replay those trajectories. Replay of the subject-specific trajectories reduced the effort required by the trainer during manual assistance, yet still generated similar patterns of muscle activation for six subjects with a chronic SCI. We also demonstrate how the impedance of the robot can be adjusted on a step-by-step basis with an error-based, learning law. This impedance-shaping algorithm adapted the robot's impedance so that the robot assisted only in the regions of the step trajectory where the subject consistently exhibited errors. The result was that the subjects stepped with greater variability, while still maintaining a physiologic gait pattern. These results are further steps toward tailoring robotic gait training to the needs of individual patients. 相似文献
29.
Sergey Tkachev Miguel Monteiro João Santos Ernesto Placidi Mohamed Ben Hassine Pedro Marques Paulo Ferreira Pedro Alpuim Andrea Capasso 《Advanced functional materials》2021,31(33):2103287
Graphene-based materials have attracted significant attention in many technological fields, but scaling up graphene-based technologies still faces substantial challenges. High-throughput top-down methods generally require hazardous, toxic, and high-boiling-point solvents. Here, an efficient and inexpensive strategy is proposed to produce graphene dispersions by liquid-phase exfoliation (LPE) through a combination of shear-mixing (SM) and tip sonication (TS) techniques, yielding highly concentrated graphene inks compatible with spray coating. The quality of graphene flakes (e.g., lateral size and thickness) and their concentration in the dispersions are compared using different spectroscopic and microscopy techniques. Several approaches (individual SM and TS, and their combination) are tested in three solvents (N-methyl-2-pyrrolidone, dimethylformamide, and cyrene). Interestingly, the combination of SM and TS in cyrene yields high-quality graphene dispersions, overcoming the environmental issues linked to the other two solvents. Starting from the cyrene dispersion, a graphene-based ink is prepared to spray-coat flexible electrodes and assemble a touch screen prototype. The electrodes feature a low sheet resistance (290 Ω □−1) and high optical transmittance (78%), which provide the prototype with a high signal-to-noise ratio (14 dB) and multi-touch functionality (up to four simultaneous touches). These results illustrate a potential pathway toward the integration of LPE-graphene in commercial flexible electronics. 相似文献
30.
Luís Henrique de Carvalho Ferreira 《Analog Integrated Circuits and Signal Processing》2011,68(1):51-57
In this paper a low-voltage low-power threshold voltage monitor for CMOS process sensing is presented. This circuit works
in weak inversion and it can be used as an elementary circuit block for on-chip compensation of the intra-die or inter-die
threshold voltage variations in low-power analog and mixed-signal SoC, since it is robust to temperature and power supply
voltage variations (similar to the bandgap voltage reference). The proposed threshold voltage monitor has been successfully
verified in a standard 0.35-μm n-well CMOS TSMC process. Experimental results have confirmed that the circuit generates an
average reference voltage of 758 mV (very close to the typical threshold voltage when extrapolated to absolute zero) for a
950 mV power supply voltage, with a variation of 39 ppm/°C for the −20 to 80°C temperature range. 相似文献