Development of cardiac prescreening device for rural population using ultralow-power embedded system

The invention is inspired by the desire to understand the opportunities and expectations of developing economies in terms of healthcare. The designed system is a point-of-care (POC) device that can deliver heart-care services to the rural population and bridge the rural-urban divide in healthcare delivery. The product design incorporates several innovations including the effective use of adaptive and multiresolution signal-processing techniques for acquisition, denoising, segmentation, and characterization of the heart sounds (HS) and murmurs using an ultralow-power embedded Mixed Signal Processor. The device is able to provide indicative diagnosis of cardiac conditions and classify a subject into either normal, abnormal, ischemic, or valvular abnormalities category. Preliminary results demonstrated by the prototype confirm the applicability of the device as a prescreening tool that can be used by paramedics in rural outreach programs. Feedback from medical professionals also shows that such a device is helpful in early detection of common congenital heart diseases. This letter aims to determine a framework for utilization of automated HS analysis system for community healthcare and healthcare inclusion.     

BIST/Digital-Compatible Testing of RF Devices Using Distortion Model Fitting

Testing of Radio Frequency (RF) circuits for nonlinearity specifications generally requires the use of multiple test measurements thereby contributing to increased test cost. Prior RF test methods have suffered from significant test calibration effort (training for supervised learners) when using compact tests or from increased test time due to direct specification measurement. On the other hand, due to aggressive technology scaling, there are plenty of digital transistors available that can be used to simplify testing of Analog/Mixed-Signal (AMS) and RF devices. In this paper, an RF test methodology is developed that: (a) allows RF devices to be tested for several distortion specifications using distortion model fitting algorithms in test time comparable to what can be achieved using supervised learning techniques while retaining the accuracy of direct specification measurement, (b) allows multiple RF specifications to be determined concurrently from a single data acquisition and (c) allows digital-compatible testing/BIST to be performed using digital testers or on-chip built in self-test (BIST) circuitry. With regard to (a), a key benefit is that no training of supervised learning algorithm is necessary. The proposed method based on distortion model fitting is shown to give excellent results across common RF performance metrics while providing ~10× improvements in test time compared to previous methods.     

Single‐Walled Carbon Nanotube Dispersions in Poly(ethylene oxide)

Dispersions of single‐walled carbon nanotubes (SWNTs) in poly(ethylene oxide) (PEO) assisted by a lithium‐based anionic surfactant demonstrate an electrical percolation of 0.03 wt.‐% and a geometrical percolation, inferred from melt rheometry, of 0.09 wt.‐%. Both the melting temperature and the extent of crystallinity of the PEO crystals decrease with increasing SWNT loading. Raman spectroscopy of the nanocomposites indicates a down‐shift of the SWNT G‐modes and suggests that the nanotubes are subjected to tensile stress transfer from the polymer at room temperature.     

Molecular Dynamics Simulation of MBE Growth of CdTe/ZnTe/Si

We simulate in three dimensions molecular beam epitaxial (MBE) growth of CdTe/ZnTe/Si using classical molecular dynamics. Atomic interactions are simulated with Stillinger–Weber potentials, whose parameters are obtained by fitting to experimental data or density function theory-calculated distortion energies of the component crystals. The effects of substrate temperature and atomic species flux ratios on epilayer morphology are investigated. The agreement between simulations and experiments suggests that this model has reasonable ability to predict the microstructures of CdTe/ZnTe/Si grown by MBE.     

A hybrid formulation for the probe-to-patch attachment-mode currentfor rectangular microstrip antennas

We present a hybrid representation for the attachment-mode current existing on the surface of a coaxially fed rectangular microstrip patch antenna. The hybrid representation consists of a one- or two-term residue and an eigenfunction series which gives the attachment-mode current at all points on the patch surface, including the probe-to-patch junction. It is numerically demonstrated that the residue and eigenfunction series blend smoothly in the close vicinity of the Stokes region which includes the probe-to-patch junction. The Stokes region is a very narrow region over which the attachment-mode current changes rapidly. The residue and eigenfunction series are used outside and within this Stokes region, respectively. This hybrid representation can be used in either spectral- or space-domain techniques for a full-wave solution to the microstrip antenna problem. The residue series is obtained by using an equivalent contour integral representation of the infinite eigenfunction series, which subsequently reduces to the Watson transform under the assumption of a slightly lossy substrate. At or near the Stokes regions the residue series is inadequate, as it cannot model the rapidly varying junction currents there. Examination of the residue series shows that the attachment mode is a superposition of exponentially attenuated, leaky, surface-traveling modes. This hybrid representation is expected to provide the optimum trade-off between speed and accuracy for computations involving electrically large finite arrays     

An efficient BEM formulation for three-dimensional steady-state heat conduction analysis of composites

In this work, an efficient boundary element formulation has been presented for three-dimensional steady-state heat conduction analysis of fiber reinforced composites. The cylindrical shaped fibers in the three-dimensional composite matrix are represented by a system of curvilinear line elements with a prescribed diameter which facilitates efficient analysis and modeling together with the reduction in dimensionality of the problem. The variations in the temperature and flux fields in the circumferential direction of the fiber are represented in terms of a trigonometric shape function together with a linear or quadratic variation in the longitudinal direction. The resulting integrals are then treated semi-analytically which reduces the computational task significantly. The computational effort is further minimized by analytically substituting the fiber equations into the boundary integral equation of the material matrix with hole, resulting in a modified boundary integral equation of the composite matrix. An efficient assembly process of the resulting system equations is demonstrated together with several numerical examples to validate the proposed formulation. An example of application is also included.     

Modeling the drain current and its equation parameters for lightly doped symmetrical double-gate MOSFETs

A 2D model for the potential distribution in silicon film is derived for a symmetrical double gate MOSFET in weak inversion. This 2D potential distribution model is used to analytically derive an expression for the subthreshold slope and threshold voltage. A drain current model for lightly doped symmetrical DG MOSFETs is then presented by considering weak and strong inversion regions including short channel effects, series source to drain resistance and channel length modulation parameters. These derived models are compared with the simulation results of the SILVACO (Atlas) tool for different channel lengths and silicon film thicknesses. Lastly, the effect of the fixed oxide charge on the drain current model has been studied through simulation. It is observed that the obtained analytical models of symmetrical double gate MOSFETs are in good agreement with the simulated results for a channel length to silicon film thickness ratio greater than or equal to 2.     

Alternate Testing of RF Transceivers Using Optimized Test Stimulus for Accurate Prediction of System Specifications

In the recent past, with the emergence of System-on-Chip (SoC), focus has shifted towards testing system specifications rather than device or module specifications. While the problem of test accessibility for test stimulus application and response capture for such high-speed systems remains a challenge to the test engineers, new test strategies are needed which can address the problem in a practical manner. In this paper, the problem of testing the transmitter and the receiver subsystems of a RF transceiver for system level specification is addressed. Instead of using different conventional test stimuli for testing each of the system level specifications of RF subsystems, a specially crafted test stimulus is used for testing all the specifications from the response of the subsystem-under-test. A new simulation approach has also been developed to perform fast behavioral simulations in frequency domain for the system-under-test. In the test method, frequency domain test response spectra are captured and non-linear regression models are constructed to map the spectral measurements onto the specifications of interest. In the presented simulation results, the test stimuli have been validated using netlist level simulation of the subsystem-under-test and specifications have been predicted within an error of ±3% of the actual value.Soumendu Bhattacharya was born in Calcutta, India, in 1978. He received his Bachelors degree from Indian Institute of Technology, Kharagpur, India, in 2000. In 2002, he received the M.S.E.E. degree in electrical engineering from Georgia Institute of Technology, Atlanta, USA. He is currently working toward his Ph.D. degree. In the summer of 2001, he worked as a summer intern in National Semiconductor, Santa Clara, CA, USA. His research interests are in the area of test generation for mixed-signal and RF circuits and systems and design-for-test.Achintya Halder received the B.S. degree in electronics and electrical communication engineering from the Indian Institute of Technology, Kharagpur, in 1998. He worked as an IC design engineer with Texas Instruments until 2000. Currently, he is a Ph.D. student and a research assistant with the School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta. His research area is analog/RF and mixed signal testing.Ganesh P. Srinivasan received the B.E. degree in Electronics and Communication Engineering from the National Institute of Technology and Science, University of Madras, Chennai (Madras), India, in 2002. He received the M.S. degree in Electrical and Computer engineering from the Georgia Institute of Technology, Atlanta, GA, in 2004 and is currently pursuing his Ph.D. degree in Electrical and Computer Engineering at the Georgia Institute of Technology, Atlanta, GA. His research interests include low cost testing approaches for analog/RF and mixed-signal circuits, and improving performance of low cost testers for enabling high quality tests.Abhijit Chatterjee received the Bachelor of Technology degree in electrical engineering from the Indian Institute of Technology, Kanpur, India, in 1981, the M.S. degree in electrical engineering and computer science from University of Illinois at Chicago in 1983 and the Ph.D. degree in electrical and computer engineering from the University of Illinois at Urbana-Champaign in 1990. Until December 1992, he was a Research Staff Member at the General Electric Research and Development Center in Schenectady, NY. His work has been cited by the Wall Street Journal and presented on a Japanese network TV program called High Tech Shower International. He is a collaborating partner in NASAs New Millennium Project. Dr. Abhijit Chatterjee is also the author of one U.S. patent and has over one hundred publications in referenced journals and conferences.     

Electrical properties of Ta/sub 2/O/sub 5/ gate dielectric on strained-Si

High dielectric constant (high-k) thin Ta/sub 2/O/sub 5/ films have been deposited on tensilely strained silicon (strained-Si) layers using a microwave plasma enhanced chemical vapour deposition technique at a low temperature. The deposited Ta/sub 2/O/sub 5/ films show good electrical properties as gate dielectrics and are suitable for microelectronic applications. The feasibility of integration of strained-Si and high-k dielectrics has been demonstrated.