A 12 b 8 kS/s 16 μW 0.35 μm CMOS algorithmic ADC for sensor interface in ubiquitous environments

This work proposes a 12 b 8 kS/s ultra-low-power CMOS algorithmic analog-to-digital converter (ADC) for sensor interface applications such as accelerometers and gyro sensors requiring high-resolution, low-power, and small size simultaneously. The proposed ADC employs switched-bias power reduction and bias sharing circuits to minimize chip area and power dissipation. A signal-insensitive all directionally symmetric layout technique based on a double-poly CMOS process reduces capacitor mismatch in the multiplying D/A converter for 12 b-level high accuracy without additional conventional calibration schemes. Two independently generated currents with the same negative temperature coefficient are subtracted from each other to implement temperature- and supply-insensitive current and voltage references on-chip. The prototype ADC in a 0.35 μm 2P4M CMOS technology demonstrates a measured differential non-linearity and integral non-linearity within 0.15 and 0.56 LSB at 12 b and shows a maximum signal-to-noise-and-distortion ratio and spurious-free dynamic range of 68 and 77 dB at 8 kS/s, respectively. The ADC with an active die area of 0.70 mm² consumes 16 μW at 8 kS/s and 2.5 V.     

A short-period GaAs-AlGaAs quantum-wire array laser with a submicrometer current blocking layer

The structure and device characteristics of a 700-nm-pitch GaAs-AlGaAs quantum-wire array laser (QWAL) with a dielectric defined current blocking layer are reported. The high wire density of the QWAL has been expected to yield more efficient carrier capture, but large spacing between the quantum wires was found to deteriorate the laser characteristics. In this work, we have improved electrical confinement into the active regions by incorporating a SiO/sub 2/ film onto the large spacing. Room-temperature pulsed operation with an output power of 9 mW at 191-mA injection current was achieved for a 200/spl times/500 /spl mu/m laser with uncoated facet. The threshold current density was 0.14 kA/cm/sup 2/. The dependence of the threshold current and the maximum power on the cavity length and width was also studied.     

Blocky artefact reduction using an adaptive constrained leastsquares method

A blocky artefact reduction algorithm using the constrained least squares (CLS) approach is described. The authors use a new objective function which effectively constrains the relationship between not only the block boundary pixels but also the inner pixels. By gracefully reducing the visible discontinuities along the block boundaries, the proposed algorithm shows excellent noise reduction performance     

Unbiased timing-error estimation in the presence of nonidealinterpolation

We propose a method to eliminate the bias term present in the timing-error estimator employed in digital receivers where the input signal is sampled by a fixed clock which is not synchronized to the transmitter clock. This bias error results from the nonideal interpolation that precedes the timing-error estimator. We show that it can be derived as a function of the previously estimated symbol timings. An unbiased timing-error estimate can then be obtained by subtracting this bias term from the output of the timing-error detector. Simulation results are included to show the performance improvement realizable by employing this method     

Design of variable loop gains of dual-loop DPLL

An approach to the derivation of variable loop gain sequences of dual-loop digital phase-locked loop (DPLL) is developed based on some modifications of the Kalman filtering formulation. It is shown that optimal loop gain sequences which are independent of measurement noise statistics can be obtained under a deterministic source model. Computer simulation results demonstrate that the adaptive dual-loop DPLL designed by using the proposed method is more robust to noise variations than the adaptive DPLL of Driessen (see ibid., vol.47, p.673-75, 1994)     

Scheduling algorithm for real-time imprecise computations tominimise maximum weighted errors using the linear programmingmethod

An optimal scheduling algorithm for imprecise systems is presented. The proposed algorithm aims at minimising the maximum weighted errors. A novel property of the algorithm is that the errors are evenly distributed among scheduled tasks. The complexity of the proposed algorithm is O(N³) in the worst case, where N is the number of tasks     

Three-state synchronization of distributed sample scramblers in thepresence of errors

In this paper, we consider the behaviors and performances of the three-state-based synchronization mechanisms of DSS in the errored environment. We establish a mathematical model to describe the synchronization mechanisms by employing the sequence space theory, and discuss the behaviors of the two different three-state synchronization schemes-the ITU-T recommended thresholded-counting scheme and the newly proposed windowed-observation scheme. We consider the design guidelines for the synchronization schemes, and finally compare their performances in the cell-based ATM     

Er-doped glass ridge-waveguide amplifiers fabricated with a collimated sputter deposition technique

We report a new fabrication process for Er-doped glass ridge waveguides. The process does not require etching of an Er-doped film in defining the lateral dimension of a waveguide, but involves a liftoff process using polyimide as a sacrificial layer. An Er-doped soda-lime silicate glass film (1.5 /spl mu/m thick) was deposited at 350/spl deg/C using a collimated sputtering technique. Conventional sputtering techniques have been known to be incompatible with a liftoff process. The collimated sputtering, however, allowed us easy liftoff of Er-doped films, and produced well-defined ridges with smooth surface profiles. A 1.7-cm-long waveguide thus fabricated shows a 1.55-/spl mu/m signal enhancement of 15.4 dB with a 980-nm pump power of 40 mW. This enhancement fully compensates for both Er absorption and waveguide losses, and results in a gain of 7.2 dB.     

LPCVD氮化硅薄膜的室温可见光发射

在4.66eV的激光激发下,在室温下LPCVD氮化硅薄膜可发射高强度可见光,其峰位位置分别为2.97,2.77,2.55,2.32,2.10和1.90eV的6个PL峰,建立了可见光发射的能隙态模型,讨论了发光机制     

驱动白色LED背景照明的微型稳压器

查询号：１９０ 引言 手持信息家电中彩色ＬＣＤ显示的出现引发了对微型、明亮的白色背景照明的需求。幸运的是最近商品化的高亮度白色ＬＥＤ能提供理想的解决方案。这些微型ＬＥＤ能提供充足的白色光而没有脆度问题和通常用在笔记本计算机中的荧光背景照明有关的成本问题、然而,它们却有一个问题白色ＬＥＤ的正向电压可高达４Ｖ,这不能直接用单节锂离子电池为它们供电。 本文描述了升压和调节锂离子电池电压为白色ＬＥＤ供电的几种不同电路。这些电路能为驱动多个白色ＬＥＤ提供足够的功率并且足够小,适合于蜂窝电话和掌上计算机应用。 …