Abnormal junction profile of silicided p+/n shallowjunctions: a leakage mechanism

The leakage mechanism in p⁺/n shallow junctions fabricated using Co silicidation and shallow trench isolation processes has been investigated using transmission electron microscopy (TEM) combined with selective chemical etching. TEM and TSUPREM-4 simulation results show that dopant profiles bend upward near the edge of the active region. The formation of the abnormal profile is attributed to transient enhanced diffusion induced by source/drain implantation. Based on the TEM and simulation results, it is suggested that the shallower junctions formed near the active edge can serve as a source for leakage current in the silicided p+ /n shallow junctions     

An efficient optimistic message logging scheme for recoverable mobile computing systems

A number of checkpointing and message logging algorithms have been proposed to support fault tolerance of mobile computing systems. However, little attention has been paid to the optimistic message logging scheme. Optimistic logging has a lower failure-free operation cost compared to other logging schemes. It also has a lower failure recovery cost compared to the checkpointing schemes. This paper presents an efficient scheme to implement optimistic logging for the mobile computing environment. In the proposed scheme, the task of logging is assigned to the mobile support station so that volatile logging can be utilized. In addition, to reduce the message overhead, the mobile support station takes care of dependency tracking and the potential dependency between mobile hosts is inferred from the dependency between mobile support stations. The performance of the proposed scheme is evaluated by an extensive simulation study. The results show that the proposed scheme requires a small failure-free overhead and the cost of unnecessary rollback caused by the imprecise dependency is adjustable by properly selecting the logging frequency.     

p53 gene therapy in vivo of herpatocellular and liver metastatic colorectal cancer

Tumor suppressor genes such as p53 contribute to the oncogenic process via loss-of-function mechanisms such as genetic mutation or complex formation with other cellular or viral proteins. p53 is mutated in approximately 50% of human tumors and has an important role in the genesis or progression of both colorectal and hepatocellular cancers. Colorectal cancer is leading cause of cancer mortality in the United States, whereas hepatocellular cancer is the leading worldwide cause of cancer death; the liver is a primary site of morbidity in both diseases. Because systemic tumor suppressor gene therapy is currently not feasible, we have chosen to develop a regional form of such therapy directed at primary or metastatic liver neoplasms. Gene replacement therapy with p53 is a promising new strategy to treat advanced human cancers.     

GaN and AlGaN high-voltage rectifiers grown by metal-organic chemical-vapor deposition

In this paper, we report the study of the electrical characteristics of GaN and AlGaN vertical p-i-n junctions and Schottky rectifiers grown on both sapphire and SiC substrates by metal-organic chemical-vapor deposition. For GaN p-i-n rectifiers grown on SiC with a relatively thin “i” region of 2 μm, a breakdown voltage over 400 V, and forward voltage as low as 4.5 V at 100 A/cm² are exhibited for a 60-μm-diameter device. A GaN Schottky diode with a 2-μm-thick undoped layer exhibits a blocking voltage in excess of ∼230 V at a reverse-leakage current density below 1 mA/cm², and a forward-voltage drop of 3.5 V at a current density of 100 A/cm². It has been found that with the same device structure and process approach, the leakage current of a device grown on a SiC substrate is much lower than a device grown on a sapphire substrate. The use of Mg ion implantation for p-guard rings as planar-edge terminations in mesageometry GaN Schottky rectifiers has also been studied.     

Multiple-gate SOI MOSFETs: device design guidelines

This paper describes computer simulations of various SOI MOSFETs with double and triple-gate structures, as well as gate-all-around devices. The concept of a triple-gate device with sidewalls extending into the buried oxide (hereby called a "/spl Pi/-gate" or "Pi-gate" MOSFET) is introduced. The Pi-gate device is simple to manufacture and offers electrical characteristics similar to the much harder to fabricate gate-all-around MOSFET. To explore the optimum design space for four different gate structures, simulations were performed with four variable device parameters: gate length, channel width, doping concentration, and silicon film thickness. The efficiency of the different gate structures is shown to be dependent of these parameters. The simulation results indicate that the the Pi-gate device is a very promising candidate for future nanometer MOSFET applications.     

Structural evaluation of thermal stratification for PWR surge line

Recent observations at operating plants and subsequent US NRC requirements have identified flow stratification in surge lines as a phenomenon that must be considered in the design basis of surge lines. To address these concerns, the stratified loading conditions were included in the design of YGN 3 and 4 surge line as a design basis transient and pipe temperature and displacement measurement were taken during YGN 3 pre-core hot functional testing to determine the degree of surge line flow stratification. The measured displacements and temperatures were extensively reviewed and evaluated in detail: (1) to verify the validity of the thermal hydraulic model used to predict the pipe top-to-bottom temperature differentials; (2) to analytically correlate measured surge line temperatures and displacements; and (3) to confirm the validity of the stratified flow analysis procedure. This paper shows that the stratified flow phenomenon is generic and therefore generic loadings can be developed and evaluated for the surge line analyses.     

C-t analysis of MOS capacitors under constant current stress

The effect of high oxide field stress is studied using capacitance-time (C-t) measurements of MOS capacitors. The stress results in parallel shifts of the C-t curve along the time axis. The flatband voltage shift ΔV_FB obtained from the initial deep depletion capacitance C(t=0⁺) follows the same trend as that from the high-frequency C-V characteristics. However, the discrepancy between the two flatband voltages becomes larger as the stress increases due to the effect of interface charges on C-t characteristics. The flatband voltage difference is converted to interface trap density, showing a steady increase of interface trap density with stress, similar to that from low-frequency C-V measurements     

Evaluating the impact of CASE: an empirical comparison of retrospective and cross-sectional survey approaches

The purpose of this paper is to evaluate two methods of assessing the productivity and quality impact of Computer Aided Software Engineering (CASE) and Fourth Generation Language (4GL) technologies: (1) by the retrospective method; and (2) the cross-sectional method. Both methods involve the use of questionnaire surveys. Developers' perceptions depend on the context in which they are expressed and this includes expectations about the effectiveness of a given software product. Consequently, it is generally not reliable to base inferences about the relative merits of CASE and 4GLs on a cross-sectional comparison of two separate samples of users. The retrospective method that requires each respondent to directly compare different products is shown to be more reliable. However, there may be scope to employ cross-sectional comparisons of the findings from different samples where both sets of respondents use the same reference point for their judgements, and where numerical rather than verbal rating scales are used to measure perceptions.     

Presupposition failure — A comedy of errors

Presuppositions of utterances are the pieces of information you convey with an utterance no matter whether your utterance is true or not. We first study presupposition in a very simple framework of updating propositional information, with examples of how presuppositions of complex propositional updates can be calculated. Next we move on to presuppositions and quantification, in the context of a dynamic version of predicate logic, suitably modified to allow for presupposition failure. In both the propositional and the quantificational case, presupposition failure can be viewed as error abortion of procedures. Thus, a dynamic assertion logic which describes the preconditions for error abortion is the suitable tool for analysing presupposition.