超薄SiO2层的热生长

隧道小孔中超薄ＳｉＯ２的生长是ＥＥＰＲＯＭ电路制造的关键工艺之一。采用ＳＵＰＲＥＭ－Ⅲ工艺模拟程序对超薄ＳｉＯ２的热生长进行了工艺模拟，经过大量的工艺实验及优化，确定了超薄ＳｉＯ２的最佳生长条件，生长出的ＳｉＯ２性能良好，完全可满足ＥＥＰＲＯＭ研制的要求。     

Experimental determination of thermal conductivity of apple and potato at different moisture contents

Thermal conductivity of apple and potato samples was measured by means of a specifically designed apparatus based on Fitch's method. The thermal conductivity was determined at various moisture contents at the sample mean temperature of 30 °C. As expected the conductivity decreases with the decrease in moisture content. Thermal conductivity data were correlated with moisture content using a straight line.     

Image coding by multistep, adaptive flux interpolation

The authors describe and discuss the new technique, multistep adaptive flux interpolation (MAFI), and its application to image data for coding. When applied to an image, MAFI produces an output which is also in an image form, but which has a more uniform feature density and a greatly reduced size. MAFI warps the input image by removing those rows and columns which contain a majority of redundant pixels. The side information required for reconstruction is minimal, and the image can be further compressed using conventional coders, making the compression ratio even higher. Because of its warped nature, the MAFI output's statistics are also more consistent with the properties assumed by block-based discrete cosine transform (DCT) methods     

Manufacture of films displaying liquid-crystalline structure

Reported is an attempt to attain orientation of macromolecules during extrusion of films of cellulose derivatives that led to the liquid-crystalline state of a polymer and resulted in enhanced film strength.     

High throughput VLSI DSP using replicated finite rings

This paper discusses strategies for implementing DSP systems using residue replication. The theory, recently introduced by two of the authors, uses formal polynomial ring mappings, from binary representations, to direct product ring implementation of integer processing arrays. The mapping produces completely independent computational arrays each computing over the same ring. This paper describes an architecture and processing array to implement, and take advantage of, the special computational ring structures that result from the mapping. A brief review of the theory and mapping techniques, is followed by the discussion of the architecture and VLSI design of an efficient inner product processing array using Fermat Primes.     

Dynamic programming implementation on array processor architectures

Dynamic Programming (DP) applies to many signal and image processing applications including boundary following, the Viterbi algorithm, dynamic time warping, etc. This paper presents an array processor implementation of generic dynamic programming. Our architecture is a SIMD array attached to a host computer. The processing element of the architecture is based on an ASIC design opting for maximum speed-up. By adopting a torus interconnection network, a dual buffer structure, and a multilevel pipeline, the performance of the DP chip is expected to reach the order of several GOPS. The paper discusses both the dedicated hardware design and the data flow control of the DP chip and the total array.This work was supported in part by the NATO, Scientific and Environmental Affairs Division, Collaborative Research Grant SA.5-2-05(CRG.960201)424/96/JARC-501.     

Effect of repositioning of rhodium direct-charge detectors in a RBMK-1000 reactor on fuel and emitter-material burnup coefficients

Scientific-Technical Center “Atomtekhénergo.” Leningrad Nuclear Power Plant. N. V. Sultanov Institute of Nuclear Reactors, Russian Scientific Center “Kurchatovskii institut.” Translated from Atomnaya énergiya, Vol. 76, No. 6, pp. 470–473, June, 1994.     

Software for dynamic reconfigurable order picking systems

This paper describes an approach, conceptual framework, and software architecture for dynamic reconfiguration of the order picking system. The research and development project was sponsored by the Material Handling Research Center (MHRC), a National Science Foundation sponsored Cooperative Industry/University Research Center. The storage configuration is assumed to be an in-the-aisle order picking system in which stockkeeping units (SKUs) can occupy variable capacity storage locations and stock-splitting is allowed among zones (clusters). The product mix may include multiple product families with different life cycles, correlated demand within families and commonality of demand across families.