Multilayer power printed structures suitable for controlling EMI noises generated in power converters

Electromagnetic interference (EMI) noises generated in power converters are diffused on the surface of conductors. This means influences occur from radiated EMI noises emitted from power transmission lines as well as conducted EMI noises transmitted from them. EMI noises diffusing on the surface of conductors are generally difficult to control using conventional concentrated constant theory. Thus, a new approach based on distributed constant circuit theory is needed in order to control EMI noises. A power converter structure to control EMI noises using multilayer power printed circuit technology is studied in this paper. A structure which can control EMI noises should simultaneously satisfy two conditions, i.e., one to shut down and one to attenuate EMI noises. The structure satisfying these conditions is studied through simulations using the Transmission-Line Modeling Method. The simulations show that the diffusion of EMI noises is controlled by dividing the flow of currents produced by EMI noises into the horizontal and perpendicular directions. That is, the horizontal current flow is controlled inside using the differences in the resistance produced from differences between inner and outer diameter of power transmission lines and the perpendicular current flow can be controlled by properly designing the thickness of the dielectric layer sandwiched between P-and N-power transmission lines with the symmetrical structure. Moreover, it is confirmed by simulations and experiments that the attenuation of EMI noises is affected by the width of the power transmission lines. It is expected that the results obtained in this paper can provide important rules when designing power converters with EMI noise control functions which use the multilayer power printed circuit technology.     

Analogue switch for very low-voltage applications

A new analogue switch suitable for operation at very low-voltage supply in a standard CMOS technology is presented. The proposed switch is based on 'quasi-floating-gate' transistors and has a simple and compact structure. For illustrative purposes, two sample-and-hold circuits operating from a single supply voltage close to the threshold voltage of a transistor, and using the proposed technique, are presented. Experimental results obtained from prototypes in a 1.5 /spl mu/m CMOS technology are provided.     

An investigation of sugar extraction methods and the use of microwave power for date syrup processing: efficiency and color related considerations.

This study investigates the effect of extraction methods on the color of date syrup and the potential use of microwave power for syrup processing. Sugar solutions were extracted from dates by boiling, soaking and blending. Color and sugar content of the extracted solutions were measured, and the percentage of sugar extracted form the total fruit sugar determined. Boiling was found to be the most efficient method of extraction whereby 74% of total samples sugar was extracted. In contrast, only 54.2% of fruit sugar was extracted by blending and 42% by soaking. In addition, solutions extracted by soaking and blending had a foaming problem in the subsequent concentration process. The extraction method had no effect on the product final color. The extracted solution was concentrated using two heating methods: conventional and microwave heating at a 600 W capacity and a frequency of 2450 MHz applied at three power levels: 10, 7, and 6. In the heating process, 180 minutes were needed to achieve a 77% degrees Brix using convective heating, while it took 81, 138, and 166 minutes of microwave heating at power level 10, 7, and 6, respectively to achieve the same concentration. Water activity of the syrup was measured within a sugar content range of 50 to 80% degrees Brix and the sugar concentration at which the product is shelf stable was determined at 76%.     

Techniques for microstructural characterization of powder-processed nickel-based superalloys

Methods are described for sample preparation of polycrystalline Ni-based superalloys in order to perform a detailed microstructural characterization. Specific techniques for the precise definition of the various phases present are outlined and these are shown to be useful for the measurement of size, volume fractions and distribution. A number of optical, scanning and transmission microscopy techniques are used to provide the necessary information.     

Wear and Creep Characteristics of a Carbon‐Derived Si3N4/SiC Micro/Nanocomposite

In the presented work some properties of a recently developed Si₃N₄/SiC micro/nanocomposite have been investigated. The material was tested using a pin on disc configuration. Under unlubricated sliding conditions using Si₃N₄ pin at 50 % humidity, the friction coefficient was in the range of 0,6 ‐ 0,7. The reduction of humidity resulted in a lower coefficient of friction, in vacuum the coefficient of friction had a value of about 0,6. The wear resistance in vacuum was significantly lower then that in air. The wear patterns on the Si₃N₄+SiC disc revealed that mechanical fracture was the wear controlling mechanism. Creep tests were realized in four point bending configuration in the temperature interval 1200‐1400 °C at stresses 50,100 and 150 MPa and the minimal creep deformation rate was established for each stress level. The activation energy, established from the minimal creep deformation had a value of about 360 kJ/mol and the stress exponent values were in the range of 0.8‐1.28. From the achieved stress exponents it can be assumed that under the studied load/temperature conditions the diffusion creep was the most probable creep controlling mechanism.     

Colloidal processing of polymer ceramic nanocomposite integral capacitors

Polymer ceramic composites form a suitable material system for low temperature fabrication of embedded capacitors appropriate for the MCM-L technology. Improved electrical properties such as permittivity can be achieved by efficient filling of polymers with high dielectric constant ceramic powders such as lead magnesium niobate-lead titanate (PMN-PT) and barium titanate (BT). Photodefinable epoxies as the matrix polymer allow fine feature definition of the capacitor elements by conventional lithography techniques. The optimum weight percent of dispersant is tuned by monitoring the viscosity of the suspension. The dispersion mechanism (steric and electrostatic contribution) in a slightly polar solvent such as propylene glycol methyl ether acetate (PGMEA) is investigated from electrophoretic measurements. A high positive zeta potential is observed in the suspension, which suggests a strong contribution of electrostatic stabilization. By optimizing the particle packing using a bimodal distribution and modified processing methodology, a dielectric constant greater than 135 was achieved in PMN-PT/epoxy system. Suspensions are made with the lowest PGMEA content to ensure the efficiency of the dispersion and efficient particle packing in the dried film. Improved colloidal processing of nanoparticle-filled epoxy is a promising method to obtain ultra-thin capacitor films (<2/spl mu/m) with high capacitance density and improved yield. Capacitance of 35 nF/cm/sup 2/ was achieved with the thinnest films (2.5-3.0 /spl mu/m).     

Hf-doped and NH/sub 3/-nitrided high-K gate dielectric thin film with least drain current degradation and flatband voltage shift

A novel technique to form high-K dielectric of HfSiON by doping base oxide with Hf and nitridation with NH/sub 3/, sequentially, is proposed. The HfSiON gate dielectric demonstrates excellent device performances such as only 10% degradation of saturation drain current and almost 45 times of magnitude reduction in gate leakage compared with conventional SiO/sub 2/ gate at the approximately same equivalent oxide thickness. Additionally, negligible flatband voltage shift is achieved with this technique. Time-dependent dielectric breakdown tests indicate that the lifetime of HfSiON is longer than 10 years at V/sub dd/=2 V.