Methods to improve efficiency of four stroke, spark ignition engines at part load

The four stroke, spark ignition (SI) engine pressure–volume diagram (p–V) contains two main parts. They are the compression–combustion–expansion (high pressure loop) and the exhaust-intake (low pressure or gas exchange loop) parts. The main reason for efficiency decrease at part load conditions for these types of engines is the flow restriction at the cross sectional area of the intake system by partially closing the throttle valve, which leads to increased pumping losses and to increased low pressure loop area on the p–V diagram. Meanwhile, the poorer combustion quality, i.e. lower combustion speed and cycle to cycle variations, additionally influence these pressure loop areas. In this study, methods for increasing efficiency at part load conditions and their potential for practical use are investigated. The study also includes a review of the vast literature on the solution of this problem. This investigation shows that the potential for increasing the efficiency of SI engines at part load conditions is not yet exhausted. Each method has its own advantages and disadvantages. Among these, the most promising methods to decrease the fuel consumption at part load conditions are stratified charge and variable displacement engines. When used in combination, the other listed methods are more effective than their usage alone.     

Differential modulation for asynchronous two‐way relay systems over frequency‐selective fading channels

We propose two schemes for asynchronous multi‐relay two‐way relay (MR‐TWR) systems in which neither the users nor the relays know the channel state information. In an MR‐TWR system, two users exchange their messages with the help of N_R relays. Most of the existing works on MR‐TWR systems based on differential modulation assume perfect symbol‐level synchronization between all communicating nodes. However, this assumption is not valid in many practical systems, which makes the design of differentially modulated schemes more challenging. Therefore, we design differential modulation schemes that can tolerate timing misalignment under frequency‐selective fading. We investigate the performance of the proposed schemes in terms of either probability of bit error or pairwise error probability. Through numerical examples, we show that the proposed schemes outperform existing competing solutions in the literature, especially for high signal‐to‐noise ratio values. Copyright © 2016 John Wiley & Sons, Ltd.