A phenomenon of charge trapping saturation induced by rapid thermal annealing

In this paper, we investigate the impact of the rapid thermal annealing (RTA) temperature on the performance degradation of NMOS devices, due to hot electrons. Our results indicate that RTA with a higher temperature achieves a higher interface barrier and induces a greater initial positive trapped charge. We observe a new three-section degradation phenomenon during DC stress at a low RTA temperature of 875°C, along with the discovery of a non-monotonic substrate current degradation which finally saturates. We note that the non-monotonicity is induced by a trapped charge polarity change, and the saturation is induced by a progression of an injected charge pocket toward the channel. This study provides an insight into the analysis of device degradation vs the RTA temperature, and should be useful for reliability optimization in process integration.     

Simultaneous area and delay minimum K-LUT mapping for K-exact networks

We address the technology mapping problem for lookup table FPGAs. The area minimization problem, for mapping K-bounded networks, consisting of nodes with at most K inputs, using K-input lookup tables, is known to be NP-complete for K 5. The complexity was unknown for K = 2, 3, and 4. The corresponding delay minimization problem (under the constant delay model) was solved in polynomial time by the flow-map algorithm, for arbitrary values of K. We study the class of K-bounded networks, where all nodes have exactly K inputs. We call such networks K-exact. We give a characterization of mapping solutions for such networks. This leads to a polynomial time algorithm for computing the simultaneous area and delay minimum mapping for such networks using K-input lookup tables. We also show that the flow-map algorithm computes the same mapping solution as our algorithm. We then show that for K = 2 the mapping solution for a 2-bounded network, minimizing the area and delay simultaneously, can be easily obtained from that of a 2-exact network derived from it by eliminating single input nodes. Thus the area minimization problem for 2-input lookup tables can be solved in polynomial time, resolving an open problem.     

A 286 mm2 256 Mb DRAM with ×32 both-ends DQ

This paper describes a 256 Mb DRAM chip architecture which provides up to ×32 wide organization. In order to minimize the die size, three new techniques: an exchangeable hierarchical data line structure, an irregular sense amp layout, and a split address bus with local redrive scheme in the both-ends DQ were introduced. A chip has been developed based on the architecture with 0.25 μm CMOS technology. The chip measures 13.25 mm×21.55 mm, which is the smallest 256 Mb DRAM ever reported. A row address strobe (RAS) access time of 26 ns was obtained under 2.8 V power supply and 85°C. In addition, a 100 MHz×32 page mode operation, namely 400 M byte/s data rate, in the standard extended data output (EDO) cycle has been successfully demonstrated     

Interaction of soliton with sinusoidal wave packet

The interaction of a soliton of the Nonlinear Schrodinger Equation (NSE) with a weak sinusoidal wave packet is treated analytically. The second-order soliton solution containing the original soliton and a perturbing soliton is expanded to first order in the amplitude of the perturbating soliton. From this expansion, one obtains the associate function of Gordon (1992) and a continuous change of position and phase of the perturbed soliton. One finds that the soliton experiences a second-order change of velocity under the influence of the perturbation. This result is then used to derive the displacement due to a wave packet of general shape, which is also confirmed by computer simulation     

Optimum filter banks for signal decomposition and its applicationin adaptive echo cancellation

The application of multirate filter banks in echo cancellation is investigated. The multiresolution algorithm is used to decompose the received sampling sequence into a number of components, and then, an adaptive algorithm is applied to cancel the echo in the received signal. In this paper, the performance of this method is discussed, from which optimal conditions for echo cancellation are established for the design of wavelet packet multiresolution decomposition. An efficient algorithm for designing such a set of optimal discrete filter banks is developed. The cases of optimal in-band and adjacent-band adaptive filtering are examined. Experimental results showed that the use of optimally designed multiresolution filter banks coupled with in-band or adjacent-band adaptive filtering is much more effective than the employment of commonly used wavelet filter banks. Furthermore, the use of the adjacent-band adaptive filtering algorithm has superior performance compared with that of the in-band filtering     

Performance model of interactive video-on-demand systems

An interactive video-on-demand (VoD) system allows users to access video services, such as movies, electronic encyclopedia, interactive games, and educational videos from video servers on a broadband network. This paper develops a performance evaluation tool for the system design. In particular, a user activity model is developed to describe the usage of system resources, i.e., network bandwidth and video server usage, by a user as it interacts with the service. In addition, we allow batching of user requests, and the effect of such batching is captured in a batching model. Our proposed queueing model integrates both the user activity and the batching model. This model can be used to determine the requirements of network bandwidth and video server and, hence, the trade-off in communication and storage costs for different system resource configurations     

An optimal algorithm for rectilinear steiner trees for channels with obstacles

The channel rectilinear Steiner tree problem is to construct an optimal rectilinear Steiner tree interconnecting n terminals on the upper shore and the lower shore of a channel without crossing any obstacles inside the channel. However, intersecting boundaries of obstacles is allowed. We present an algorithm that computes an optimal channel rectilinear Steiner tree in O(F₁(k)n + F₂(k)) time, where k is the number of obstacles inside the channel and F₁ and F₂ are exponential functions of k. For any constant k the proposed algorithm runs in O(n) time.     

High speed flow visualization of a closed loop pulsating heat pipe

We provide the high speed flow visualization results for the closed loop pulsating heat pipes (PHPs). It is identified that there exists the bulk circulation flow which lasts longer and the local flow direction switch flow. The bubble displacements and velocities do display the sine oscillation waves but the local oscillation waves were superimposed with short periods and small oscillation amplitudes. Distinct with the methanol PHP, the water PHP has quasi-rectangular shape for the bubble displacements, behaving the periodic stationary-fast movement characteristics. Dispersed bubbles, vapor plugs and the transition flow patterns from the dispersed bubbles to the vapor plugs are the major flow patterns in PHP. Long vapor plugs are only observed for the methanol PHP, not observed in the water PHP, due to the vapor plug deformation and breakup mechanism, which was analyzed in the present paper. Bubble sizes have quasi-fixed distributions versus time over the entire PHP, but have unsymmetry distributions among various tubes. The complicated combined effects of bubble nucleation, coalescence and condensation are responsible for the oscillation flow in PHP.     

Semiconducting Carbon Nanotubes for Improved Efficiency and Thermal Stability of Polymer–Fullerene Solar Cells

The effects of the incorporation of semiconducting single‐walled nanotubes (sc‐SWNTs) with high purity on the bulk heterojunction (BHJ) organic solar cell (OSC) based on regioregular poly(3‐hexylthiophene‐2,5‐diyl):[6,6]‐phenyl‐C₆₁‐butyric acid methyl ester (rr‐P3HT:PCBM) are reported for the first time. The sc‐SWNTs induce the organization of the polymer phase, which is evident from the increase in crystallite size, the red‐shifted absorption characteristics and the enhanced hole mobility. By incorporating sc‐SWNTs, OSC with a power conversion efficiency (PCE) as high as 4% can be achieved, which is ≈8% higher than our best control device. A novel application of sc‐SWNTs in improving the thermal stability of BHJ OSCs is also demonstrated. After heating at 150 °C for 9 h, it is observed that the thermal stability of rr‐P3HT:PCBM devices improves by more than fivefold with inclusion of sc‐SWNTs. The thermal stability enhancement is attributed to a more suppressed phase separation, as shown by the remarkable decrease in the formation of sizeable crystals, which in turn can be the outcome of a more controlled crystallization of the blend materials on the nanotubes.     

Silicon‐Modified Rare‐Earth Transitions—A New Route to Near‐ and Mid‐IR Photonics

Silicon underpins microelectronics but lacks the photonic capability needed for next‐generation systems and currently relies on a highly undesirable hybridization of separate discrete devices using direct band gap semiconductors. Rare‐earth (RE) implantation is a promising approach to bestow photonic capability to silicon but is limited to internal RE transition wavelengths. Reported here is the first observation of direct optical transitions from the silicon band edge to internal f‐levels of implanted REs (Ce, Eu, and Yb); this overturns previously held assumptions about the alignment of RE levels to the silicon band gap. The photoluminescence lines are massively redshifted to several technologically useful wavelengths and modeling of their splitting indicates that they must originate from the REs. Eu‐implanted silicon devices display a greatly enhanced electroluminescence efficiency of 8%. Also observed is the first crystal field splitting in Ce luminescence. Mid‐IR silicon photodetectors with specific detectivities comparable to existing state‐of‐the‐art mid‐IR detectors are demonstrated.