The effects of plasma etching induced gate oxide degradation onMOSFET's 1/f noise

The effects of the plasma etching process induced gate oxide damages on device's low frequency noise behavior are investigated on MOSFET's fabricated with different field plate perimeter to gate area ratio antennas. Abnormal 1/f noise spectrum with a shoulder centered in the frequency range of 100 and to 1 kHz was frequently observed in small geometry devices, and it is attributable to a nonuniform distribution of oxide traps induced by plasma etching process     

Transient behavior of subthreshold characteristics of fullydepleted SOI MOSFETs

It has been found that the subthreshold currents of fully depleted silicon-on-insulator (SOI) MOSFETs show a transient behavior under certain front-gate and back-gate voltage conditions. The cause of this anomaly is explained, and applications for the phenomenon are pointed out. Particularly, a simple way to measure the silicon film thickness is suggested     

All-optical photonic switches using integrated inverted asymmetricFabry-Perot modulators and heterojunction phototransistors

InGaAs/GaAs(100) multiple-quantum-well-based inverted cavity asymmetric Fabry-Perot modulators are vertically integrated with GaAs/AlGaAs heterojunction phototransistors to yield all-optical photonic switches. The photonic switches using `normally on' modulator pixels exhibit an output on-off ratio of 12:1 with internal optical gain of 4 dB. The photonic switches using `normally off' modulator pixels yield similar contrast and gain, but exhibit intrinsic bistable behavior. The inverted cavity modulators employed permit utilizing the transparency of the GaAs substrate at the operating wavelength and offer advantages for fabricating large arrays for optical signal processing     

The use of doped polyaniline as an electrode in the galvanic anodic protection of ferrous metals in industrial acid solutions

In order to investigate the galvanic anodic protection (GAP) of ferrous metals (such as 410, 304 and 316 stainless steels) in acid solutions by doped polyaniline (PANi), separate doped PANi powder-pressed electrodes with different surface areas (the area ratio of the PANi electrode to stainless steel is between 1:1 and 1:2) have been prepared. These were coupled with ferrous metal in the following solutions: 5 M sulphuric acid, 5 M phosphoric acid and industrial phosphoric acid (containing 5 M phosphoric acid and 0.05% chloride ion) to construct a galvanic cell, in which PANi is cathode while ferrous metal is anode. The results indicate that a PANi electrode with sufficient area can provide corrosion protection to stainless steel in these acidic solutions. A pilot scale coupling experiment was carried out. The results indicate that PANi is a promising material as an electrode for the anodic protection of ferrous metals in acidic solutions in industrial situations.     

一氧化碳对聚丙烯收率、结构的影响

分析研究了Montell(Himont)聚丙烯工艺中CO对聚丙烯收率、产品结构的影响。     

α厚层测量法的定标方法探讨

本文比较了几种常用的α厚层测量法的定标方法。实验结果表明,共沉淀法是一种比较理想的定标方法,它所制得的标准样品的定标曲线线性较好,探测效率较稳定。     

标准椅全身计数器对不同年龄组均匀体模源全能峰效率的刻度

本文介绍了用标准液体源均匀充入聚氯乙烯制的体模,刻度标准椅全身计数器〔φ8″×4″(NaI)〕的方法和结果。分别就代表6个年龄组的体模,测定了标准椅全身计数器对5种能量(364,637,898,1460和1836keV)γ射线的全能峰效率;给出了全能峰效率与γ射线能量和被测对象体重的关系曲线。     

北京谱仪端盖簇射计数器工作气体的研究

为使北京谱仪端盖族射计数器更好地工作在自猝灭流光ＳＱＳ模式下，提高其能量分辨以及线性等指标，用Ａｒ，ＣＯ２，Ｌｓｏｂｕｔａｎｅ三元工作气体对探测器的工作性能进行了仔细研究，找出了一适合于主雇地数器的工作气体，此外，还研究了异丁的纯度对探测器性能的影响。     

Suppression of boron penetration in p+ polysilicon gateP-MOSFETs using low-temperature gate-oxide N2O anneal

It has been reported that high-temperature (~1100°C) N₂ O-annealed oxide can block boron penetration from poly-Si gates to the silicon substrate. However, this high-temperature step may be inappropriate for the low thermal budgets required of deep-submicron ULSI MOSFETs. Low-temperature (900~950°C) N₂O-annealed gate oxide is also a good barrier to boron penetration. For the first time, the change in channel doping profile due to compensation of arsenic and boron ionized impurities was resolved using MOS C-V measurement techniques. It was found that the higher the nitrogen concentration incorporated at Si/SiO₂ interface, the more effective is the suppression of boron penetration. The experimental results also suggest that, for 60~110 Å gate oxides, a certain amount of nitrogen (~2.2%) incorporated near the Si/SiO₂ interface is essential to effectively prevent boron diffusing into the underlying silicon substrate