Further result on a dynamic recurrent neural-network-based adaptive observer for a class of nonlinear systems

In Kim et al. [(1997) A dynamic recurrent neural-network-based adaptive observer for a class of nonlinear systems. Automatica 33(8), 1539–1543], authors present an excellent neural network (NN) observer for a class of nonlinear systems. However, the output error equation in their paper is strictly positive real (SPR) which is restrictive assumption for nonlinear systems. In this note, by introducing a vector b₀ and Lyapunov equation, the observer design is obtained without requiring the SPR condition. Thus, our observer can be applied to a wider class of systems.     

Evolutionary Algorithms and Theirs Use in the Design of Sequential Logic Circuits

In this paper an approach based on an evolutionary algorithm to design synchronous sequential logic circuits with minimum number of logic gates is suggested. The proposed method consists of four main stages. The first stage is concerned with the use of genetic algorithms (GA) for the state assignment problem to compute optimal binary codes for each symbolic state and construct the state transition table of finite state machine (FSM). The second stage defines the subcircuits required to achieve the desired functionality. The third stage evaluates the subcircuits using extrinsic Evolvable Hardware (EHW). During the fourth stage, the final circuit is assembled. The obtained results compare favourably against those produced by manual methods and other methods based on heuristic techniques.     

Molecular Dynamics of CYFIP2 Protein and Its R87C Variant Related to Early Infantile Epileptic Encephalopathy

The CYFIP2 protein (cytoplasmic FMR1-interacting protein 2) is part of the WAVE regulatory complex (WRC). CYFIP2 was recently correlated to neurological disorders by the association of the R87C variant with early infantile epileptic encephalopathy (EIEE) patients. In this set of syndromes, the epileptic spasms and seizures since early childhood lead to impaired neurological development in children. Inside the WRC, the variant residue is at the CYFIP2 and WAVE1 protein interface. Thus, the hypothesis is that the R87C modification weakens this interaction, allowing the WRC complex’s constant activation. This work aimed to investigate the impacts of the mutation on the structure of the WRC complex through molecular dynamics simulation. For that, we constructed WRC models containing WAVE1-NCKAP1 proteins complexed with WT or R87C CYFIP2. Our simulations showed a flexibilization of the loop comprising residues 80–110 due to the loss of contacts between internal residues in the R87C CYFIP2 as well as the key role of residues R/C87, E624, and E689 in structural modification. These data could explain the mechanism by which the mutation impairs the stability and proper regulation of the WRC.     

Therapeutic Vaccines for HPV-Associated Oropharyngeal and Cervical Cancer: The Next De-Intensification Strategy?

The rise in human papillomavirus (HPV)-associated oropharyngeal squamous cell carcinoma (OPSCC) has prompted a quest for further understanding of the role of high-risk HPV in tumor initiation and progression. Patients with HPV-positive OPSCC (HPV+ OPSCC) have better prognoses than their HPV-negative counterparts; however, current therapeutic strategies for HPV+ OPSCC are overly aggressive and leave patients with life-long sequalae and poor quality of life. This highlights a need for customized treatment. Several clinical trials of treatment de-intensification to reduce acute and late toxicity without compromising efficacy have been conducted. This article reviews the differences and similarities in the pathogenesis and progression of HPV-related OPSCC compared to cervical cancer, with emphasis on the role of prophylactic and therapeutic vaccines as a potential de-intensification treatment strategy. Overall, the future development of novel and effective therapeutic agents for HPV-associated head and neck tumors promises to meet the challenges posed by this growing epidemic.     

An online scheme for the isolation of BGP misconfiguration errors

Being the primary interdomain routing protocol, Border Gateway Protocol (BGP) is the singular means of path establishment across the Internet. Therefore, misconfiguration errors in BGP routers result in failure to establish paths which in turn can cause several networks to become unreachable. In this paper, we first analyze data from recent BGP tables to show that misconfiguration errors occur very frequently in the Internet today. We then show theoretically and using real-world events the impact of these errors on routing stability. A scheme for real-time isolation of large-scale BGP misconfiguration events is then proposed in this paper. Our methodology is based on statistical techniques and is evaluated using data from past wellknown misconfiguration events. We show the effectiveness of our method as compared to the current state-of-the-art.     

A Novel AC UPS With High Power Factor and Fast Dynamic Response

This paper presents a novel ac uninterruptible-power-system (UPS) scheme with high power factor, which offers excellent characteristics such as sinusoidal input current, sinusoidal output voltage, fast regulation of the ac mains, galvanic isolation, and fast transient response. The proposed converter includes the offline–online concept, which avoids the continuous charging and discharging of the battery as it occurs in a typical online UPS. Analysis and design considerations, as well as simulation and experimental results, are given in this paper.      

On the Phase Composition,Morphology, and Optical and Electronic Characteristics of AlN Nanofilms Grown on Misoriented GaAs(100) Substrates

Semiconductors - Thin AlN nanofilms are produced by reactive ion-plasma deposition onto GaAs(100) substrates misoriented with respect to the 〈100〉 direction to different degrees. It...     

An Ultra-Low-Power Embedded EEPROM for Passive RFID Tags

采用Chartered 0.35μm EEPROM工艺设计并实现了一个适用于无源射频电子标签的256位超低功耗EEPROM存储器.芯片实现了块编程和擦写功能,并通过优化敏感放大器和控制逻辑的结构,实现了读存储器时间和功耗的最优化.最后给出了芯片在编程/擦写/读操作情况下的功耗测试结果.在电源电压为1.8V,数据率为640kHz时,EEPROM编程/擦写的平均功耗约为68μA,读操作平均功耗约为0.6μA.     

A dual voltage-frequency VLSI chip for image watermarking in DCT domain

In this brief, we present a new VLSI architecture that can insert invisible or visible watermarks in images in the discrete cosine transform domain. The proposed architecture incorporates low-power techniques such as dual voltage, dual frequency, and clock gating to reduce the power consumption and exploits pipelining and parallelism extensively in order to achieve high performance. The supply voltage level and the operating frequency are chosen for each module so as to maintain the required bandwidth and throughput match among the different modules. A prototype VLSI chip was designed and verified using various Cadence and Synopsys tools based on TSMC 0.25-/spl mu/m technology with 1.4 M transistors and 0.3 mW of estimated dynamic power.