首页 | 本学科首页   官方微博 | 高级检索  
文章检索
  按 检索   检索词:      
出版年份:   被引次数:   他引次数: 提示:输入*表示无穷大
  收费全文   3935篇
  免费   74篇
  国内免费   11篇
电工技术   55篇
综合类   2篇
化学工业   756篇
金属工艺   140篇
机械仪表   190篇
建筑科学   67篇
矿业工程   2篇
能源动力   142篇
轻工业   319篇
水利工程   21篇
石油天然气   8篇
无线电   725篇
一般工业技术   802篇
冶金工业   367篇
原子能技术   28篇
自动化技术   396篇
  2024年   63篇
  2023年   36篇
  2022年   63篇
  2021年   127篇
  2020年   112篇
  2019年   86篇
  2018年   115篇
  2017年   116篇
  2016年   130篇
  2015年   101篇
  2014年   143篇
  2013年   232篇
  2012年   217篇
  2011年   257篇
  2010年   188篇
  2009年   196篇
  2008年   190篇
  2007年   157篇
  2006年   132篇
  2005年   95篇
  2004年   92篇
  2003年   90篇
  2002年   58篇
  2001年   92篇
  2000年   72篇
  1999年   59篇
  1998年   151篇
  1997年   114篇
  1996年   78篇
  1995年   61篇
  1994年   62篇
  1993年   51篇
  1992年   33篇
  1991年   40篇
  1990年   24篇
  1989年   28篇
  1988年   23篇
  1987年   11篇
  1986年   13篇
  1985年   7篇
  1984年   12篇
  1983年   13篇
  1982年   12篇
  1981年   9篇
  1980年   11篇
  1979年   5篇
  1977年   8篇
  1976年   13篇
  1974年   3篇
  1973年   3篇
排序方式: 共有4020条查询结果,搜索用时 15 毫秒
21.
Radar images can show great variability from pixel to pixel, which is an obstacle to effective processing. This variability, due to speckle created by the radar wave coherence, necessitates the use of more adapted filters. Previous studies have shown that multiresolution wavelet analysis yields better results but produces artefacts due to multiscale decomposition. This paper proposes a method that reduces these effects by introducing the fractal dimension. The resultant filter combines wavelet decomposition and variance change model based on the level of variance estimated by studying the fractal dimension of the image.  相似文献   
22.
In this paper, the effect of the nonself-aligned process on the performance variation of a bottom-gate metal oxide semiconductor (MOS) transistor is discussed using a device simulator. The simulation results predict that the nonself-aligned bottom-gate MOS transistor cannot be scaled into the deep submicron regions. A simple fully self-aligned bottom-gate (FSABG) metal oxide semiconductor field effect transistor (MOSFET) technology is then proposed and developed. A new technique for forming thermal oxide on poly-Si serving as the bottom-gate dielectric is also investigated. It is found that the quality of the oxide on the poly-Si recrystallized by the metal induced uni-lateral crystallization (MIUC) is much higher than that by the solid phase crystallization (SPC). Deep submicron fully self-aligned bottom-gate pMOS transistors are fabricated successfully using the proposed technology. The experimentally measured results indicate the device performances depend strongly on the channel-width, and get comparable to that of a single crystal MOSFET if the channel width is less than 0.5/spl mu/m. The effects of the channel width on the device performances are discussed. In addition, the experimental results also confirm that the proposed technology has a good control of the channel film thickness.  相似文献   
23.
AlGaAs/GaAs HBTs with f/sub T/ of 52 GHz and f/sub max/ of 85 GHz have been obtained using a heavily-carbon-doped base layer. The HBT epitaxial layers were prepared by low-pressure MOVPE using carbon tetrachloride as the carbon source. To the author's knowledge, this work reports the first carbon-doped AlGaAs/GaAs HBTs with f/sub T/ and f/sub max/ greater than 50 GHz.<>  相似文献   
24.
The leaky bucket is a popular method that can regulate traffic into an ATM broadband network. This paper examines a simple but innovative modification that would also provide priority to access the network. This is done by requiring cells of different classes to obtain different numbers of tokens before receiving their services. As a step further, a dynamic scheme can be used in which the tokens allocated to each class are changed according to the traffic load. Performance evaluations of mean cell delays and cell loss probabilities are obtained to provide insight into the behaviour of the system and to provide guideline for furture design.  相似文献   
25.
A high-performance adder is one of the most critical components of a processor which determines its throughput, as it is used in the ALU, the floating-point unit, and for address generation in case of cache or memory access. In this paper, low-power design techniques for various digital circuit families are studied for implementing high-performance adders, with the objective to optimize performance per watt or energy efficiency as well as silicon area efficiency. While the investigation is done using 100 MHz, 32 b carry lookahead (CLA) adders in a 0.6 μm CMOS technology, most techniques presented here can also be applied to other parallel adder algorithms such as carry-select adders (CSA) and other energy efficient CMOS circuits. Among the techniques presented here, the double pass-transistor logic (DPL) is found to be the most energy efficient while the single-rail domino and complementary pass-transistor logic (CPL) result in the best performance and the most area efficient adders, respectively. The impact of transistor threshold voltage scaling on energy efficiency is also examined when the supply voltage is scaled from 3.5 V down to 1.0 V  相似文献   
26.
In this paper, corporate-feed circularly polarized microstrip array antennas are studied. The antenna element is a series-feed slot-coupled structure. Series feeding causes sequential rotation effect at the element level. Antenna elements are then used to form the subarray by applying sequential rotation to their feeding. Arrays having 4, 16, and 64 elements were made. The maximum achieved gains are 15.3, 21, and 25.4 dBic, respectively. All arrays have less than 15 dB return loss and 3 dB axial ratio from 10 to 13 GHz. The patterns are all quite symmetrical.  相似文献   
27.
Park  C.S. Park  C.K. Ko  S.J. 《Electronics letters》2008,44(5):337-338
In the scalable video coding (SVC) standard, a simple inter-layer intra prediction (ILIP) method has been adopted to reduce the bit rate of scalable video sequences. Proposed is an improved ILIP method by generalising the original one adopted in the SVC. Experimental results show that the proposed method can reduce bit rates by 4.1 to 5.9%, compared with the original one, while average PSNR is not decreased.  相似文献   
28.
We investigated the low temperature reactions between the Ti films created by the ionized sputtering process and the (001) single crystal silicon wafers using high resolution transmission electron microscopy and x-ray diffractometry. We observed that the amorphous Ti-Si intermixed layer is formed at the Ti-Si interface whose thickness increased with the thickness of the deposited Ti films. The amorphous interlayer grew upon annealing treatments at the temperatures below 450°C. We also observed that the crystallization of the amorphous interlayer occurred upon annealing at 500°C. The first formed phase is Ti5Si3 in contact with Ti films, which is epitaxial with Ti films. Upon further annealing at 500°C, the Ti5Si4 phase and C49 TiSi2 phase formed in the regions close to Ti films and Si substrates, respectively.  相似文献   
29.
A sampled-grating distributed Bragg reflector laser module having an integrated multiwavelength locker has been developed and evaluated. The uniquely designed wavelength locker made of thermally controlled etalon has provided uniform wavelength monitoring and very stable wavelength locking in the 188-ITU grid channels (37 nm) with 25-GHz spacing. Over the case temperature from -5/spl deg/C to 65/spl deg/C, the laser wavelength was locked within /spl plusmn/0.5 GHz, and the total power consumption of the module was less than 4 W.  相似文献   
30.
A method of calculating the driving-point and transfer admittances of waveguide diode mounts with radial resonators is presented. The method is applicable to a variety of mount configurations, including the widely used resonant-cap mount. The analysis uses multimodal admittance matrices to represent the radial regions and their coupling and includes the influence of the waveguide boundary conditions. The analysis proceeds by first determining (from the matching of tangential fields at the common boundary) the coupling between radial regions in the form of a mode-coupling matrix. By multiplying this matrix with the generalized admittance matrices of connecting radial regions to form an overall admittance matrix, the driving-point and transfer admittances for a general radial-resonator mount can be extracted. The method is demonstrated by application to the resonant-cap mount. The accuracy of the analysis is confirmed by comparison with experimental results  相似文献   
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号