一种简单的衰减相移掩模

:本文介绍了一种与传统Cr掩模制作工艺相兼容的单层衰减相移掩模的结构、原理和制作方法 ,提供了部分实验结果。     

钢铁冶金企业门禁一卡通系统的应用研究

作为"一卡通"的一个子系统,门禁系统早已超越了单纯的门道及钥匙管理,它已经逐渐发展成为一套完整的出入管理系统.本文对钢铁冶金企业中应用较为广泛的门禁一卡通系统的功能进行了需求分析,给出了系统的网络结构设计,并详细介绍该系统的各项功能以及可靠性及安全防护措施,对系统特点进行了详细描述.     

基于Protues的单片机教学改革探索

本文对单片机课程建设中利用Protues仿真软件辅助实践课程教学的教学方法进行了进一步探索.深入分析当前单片机教学过程中实践教学手段及环节设计的不足之处.结合新时代下市场变化及新版本Protues的新特性,提出更为合理的教学方案和教学环节设计.实践效果显示,利用软件新特性对单片机的实践教学进行改革,不仅有利于学生学习思考,掌握知识,同时也帮助了教师更好地进行知识的整理、积累和传递.     

Field‐Induced n‐Doping of Black Phosphorus for CMOS Compatible 2D Logic Electronics with High Electron Mobility

Black phosphorus (BP) has been considered as a promising two‐dimensional (2D) semiconductor beyond graphene owning to its tunable direct bandgap and high carrier mobility. However, the hole‐transport‐dominated characteristic limits the application of BP in versatile electronics. Here, we report a stable and complementary metal oxide semiconductor (COMS) compatible electron doping method for BP, which is realized with the strong field‐induced effect from the K⁺ center of the silicon nitride (Si_xN_y). An obvious change from pristine p‐type BP to n type is observed after the deposit of the Si_xN_y on the BP surface. This electron doping can be kept stable for over 1 month and capable of improving the electron mobility of BP towards as high as ~176 cm² V^–1 s^–1. Moreover, high‐performance in‐plane BP p‐n diode and further logic inverter were realized by utilizing the n‐doping approach. The BP p‐n diode exhibits a high rectifying ratio of ~10⁴. And, a successful transfer of the output voltage from “High” to “Low” with very few voltage loss at various working frequencies were also demonstrated with the constructed BP inverter. Our findings paves the way for the success of COMS compatible technique for BP‐based nanoelectronics.     

Using Bulk Heterojunctions and Selective Electron Trapping to Enhance the Responsivity of Perovskite–Graphene Photodetectors

Graphene field effect transistor sensitized by a layer of semiconductor (sensitizer/GFET) is a device structure that is investigated extensively for ultrasensitive photodetection. Among others, organometallic perovskite semiconductor sensitizer has the advantages of long carrier lifetime and solution processable. A further step to improve the responsivity is to design a structure that can promote electron–hole separation and selective carrier trapping in the sensitizer. Here, the use of a hybrid perovskite–organic bulk heterojunction (BHJ) as the light sensitizer to achieve this goal is demonstrated. Our spectroscopy and device measurements show that the CH₃NH₃PbI₃–PCBM BHJ/GFET device has improved charge separation yield and carrier lifetime as compared to a reference device with a CH₃NH₃PbI₃ sensitizer only. The key to these enhancement is the presence of [6,6]‐phenyl‐C₆₁‐butyric acid methyl ester (PCBM), which acts as charge separation and electron trapping sites, resulting in a 30‐fold increase in the photoresponsivity. This work shows that the use of a small amount of electron or hole acceptors in the sensitizer layer can be an effective strategy for improving and tuning the photoresponsivity of sensitizer/GFET photodetectors.     

Flexible Electronics: Thin Silicon Die on Flexible Substrates

Silicon thinned to 50 mum and less is flexible allowing the fabrication of flexible and conformable electronics. Two techniques have been developed to achieve this goal using thinned die: die flip chip bonded onto flexible substrates [polyimide and liquid crystal polymer (LCP)] and die flip chip laminated onto LCP films. A key to achieving each of these techniques is the thinning of die to a thickness of 50 mum or thinner. Conventional grinding and polishing can be used to thin to 50 mum. At 50 mum, the active die becomes flexible and must be handled by temporarily bonding it to a holder die for assembly. Both reflow solder and thermocompression assembly methods are used. In the case of solder assembly, underfill is used to reinforce the solder joints. With thermocompression bonding of the die to an LCP substrate, the LCP adheres to the die surface, eliminating the need for underfill.     

参数浮动下低功耗多米诺门的蒙特卡罗分析

Using the multiple-parameter Monte Carlo method, the effectiveness of the dual threshold voltage technique （DTV） in low power domino logic design is analyzed. Simulation results indicate that under significant temperature and process fluctuations, DTV is still highly effective in reducing the total leakage and active power consumption for domino gates with speed loss. Also, regarding power and delay characteristics, different structure domino gates with DTV have different robustness against temperature and process fluctuation.     

感知区分服务的MPLS流量工程技术研究

区分服务（Diffsevr）通过服务分级定义了流量的逐跳行为（PHB）；流量工程（Traffic Engnineering）实现转发路径的优化。感知区分服务的MPLS流量工程（Diffsevr-aware MPLS Traffic Engnineering，简称DS-TE）将MPLS的区分服务与流量工程结合在一起，使其能够感知彼此的存在。DS-TE提出了基于类的资源分配思想，可以根据业务的类型，细粒度地建立交换路径，进一步保证了QoS。     

非晶硅顶电池中的n型掺杂层对非晶硅/微晶硅叠层太阳电池性能的影响

采用超高频等离子增强化学气相沉积(VHF-PECVD)技术,逐次高速沉积非品硅顶电池及微晶硅底电池,形成pin/pin型非晶硅/微晶硅叠层电池.通常顶电池的n层与底电池的P层均采用微晶硅材料来形成隧穿复合结,然而该叠层电池的光谱响应测试结果表明,顶电池存在着明显的漏电现象.针对该问题作者提出,在顶电池的微品硅n层中引入非晶硅n保护层的方法.实验结果表明,非晶硅n层的引入有效地改善了顶电池漏电的现象;在非晶硅n层的厚度为6nm时,顶电池的漏电现象消失,叠层电池的开路电压由原来的1.27提高到1.33V,填允因子由60%提高剑63%.