Variable VCC design techniques forbattery-operated DRAMs

Wide-voltage-range DRAMs with extended data retention are desirable for battery-operated or portable computers and consumer devices. The techniques required to obtain wide operation, functionality, and performance of standard DRAMs from 1.8 V (two NiCd or alkaline batteries) to 3.6 V (upper end of LVTTL standard) are described. Specific techniques shown are: (1) a low-power and low-voltage reference generator for detecting V_CC level; (2) compensation of DC generators, V_BB and V_PP, for obtaining high speed at reduced voltages; (3) a static word-line driver and latch-isolation sense amplifier for reducing operating current; and (4) a programmable V_CC variable self-refresh scheme for obtaining maximum data retention time over a full operating range. A sub-50-ns access time is obtained for a 16 M DRAM (2 M×8) by simulation     

Scale and rotation invariant pattern recognition using complex-log mapping and augmented second order neural network

A scale and rotation invariant pattern recognition system using complex-log mapping (CLM) and an augmented second order neural network (SONN) is proposed. CLM is very useful for extracting the scale and rotation invariant features. The results are, however, given in a wrap-around translated form. This problem is solved with an augmented SONN. Experimental results show that the proposed system has improved recognition performance.<>     

An accurate intrinsic capacitance modeling for deep submicrometerMOSFET's

This paper presents a new approach to the modeling of MOSFET capacitive characteristics for accurate simulation of deep submicrometer integrated circuits. The C-V characteristics of our new quasistatic intrinsic capacitance model accurately describes the short channel effects of deep submicrometer MOSFET's by accounting for velocity saturation and series resistance effects. The use of charge equations consistent with the short channel I-V characteristics leads to C-V characteristics which preserve all major short channel effects. The C-V calculation, based on nonpinned surface potential approach and drift-diffusion model, shows highly accurate short-channel effects and inherently smooth transitions for all conditions of device operation. The accuracy of the C-V characteristics has been demonstrated by comparison with the Ward-Dutton model and PISCES simulation results     

Temperature-compensation circuit techniques for high-density CMOSDRAMs

Temperature-compensation circuit techniques are presented for the CMOS DRAM internal voltage converter, the RC-delay circuit, and the back-bias generator, which do not need any additional process steps. The above-mentioned circuits have been designed and evaluated through a 16-Mb CMOS DRAM process. These circuits have shown an internal voltage converter (IVC) with an internal voltage temperature coefficient of 185 ppm/°C, and an RC-delay circuit with a delay time temperature coefficient of 0.03%/°C. As a result, a 6.5-ns faster RAS access time and improved latchup immunity have been achieved, compared with conventional circuit techniques     

A digital technique to estimate second-order distortion usinghigher order coherence spectra

A digital spectral method for evaluating second-order distortion of a nonlinear system, which can be represented by Volterra kernels up to second order and which is subjected to a random noise input, is discussed. The importance of departures from the commonly assumed Gaussian excitation is investigated. The Hinich test is shown to be an appropriate test for orthogonality in the system identification. Tests for Gaussianity of two important sources, which are commonly used for Gaussian inputs in nonlinear system identification, are presented: (1) commercial software routines for simulation experiments, and (2) noise generators for practical experiments. The deleterious effects of assuming a Gaussian input when it is not are demonstrated. The random input method for evaluating the second-order distortion of a nonlinear system is compared with the sine-wave input method using both simulation and experimental data. The approach is applied to a loudspeaker in the low-frequency band     

A 3.3-V single power supply 16-Mb nonvolatile virtual DRAM using aNAND flash memory technology

A 3.3-V 16-Mb nonvolatile memory having operation virtually identical to DRAM with package pin compatibility has been developed. Read and write operations are fully DRAM compatible except for a longer RAS precharge time after write. Fast random access time of 63 ns with the NAND flash memory cell is achieved by using a hierarchical row decoder scheme and a unique folded bit-line architecture which also allows bit-by-bit program verify and inhibit operation. Fast page mode with a column address access time of 21 ns is achieved by sensing and latching 4 k cells simultaneously. To allow byte alterability, nonvolatile restore operation with self-contained erase is developed. Self-contained erase is word-line based, and increased cell disturb due to the word-line based erase is relaxed by adding a boosted bit-line scheme to a conventional self-boosting technique. The device is fabricated in a 0.5-μm triple-well, p-substrate CMOS process using two-metal and three-poly interconnect layers. A resulting die size is 86.6 mm², and the effective cell size including the overhead of string select transistors is 2.0 μm²     

Technique for suppression of pattern dependence in a semiconductor-optical-amplifier wavelength converter

Wavelength converters that employ cross-gain modulation (XGM) in semiconductor optical amplifiers (SOAs) are limited in bit rate by the amplifier's pattern dependent response. We substantially suppress this pattern dependence by converting the phase modulation at the data transitions to amplitude modulation using a fiber grating filter. We use this technique to obtain error-free wavelength conversion of 10-Gb/s nonreturn-to-zero (NRZ) data using an SOA that showed an error floor at 10/sup -5/ bit-error rate (BER) when used alone.     

Algorithm for mapping between information bits and channel symbolsin MTCM codes

An algorithm for mapping between information bits and channel symbols in multiple trellis-coded modulation (MTCM) codes with M-PSK signal sets is proposed. The core of the algorithm assigns information bits with a Hamming distance in proportion to the sum of the Euclidean distance to each M-PSK symbol. The analytical results show that the additional gains from applying the algorithm can be achieved with little or no loss     

Development of the Base Station Controller and Manager in the CDMA Mobile System

The base station (BS) in the CDMA Mobile System (CMS) connects calls through the radio interface and is designed to provide mobile subscribers with high quality service in spite of mobile subscribers’ motions. The BS consists of multiple base station transceiver subsystems (BTSs), a base station controller (BSC) and a base station manager (BSM). This paper is concerned with the BSC and the BSM. The BSC is located between the BTSs and the mobile switching center (MSC) connected with the public network, and is responsible for controlling mobile calls from and to mobile subscribers via the BTSs. The BSM provides operator-interfaces per the BS and takes responsibility of operation and maintenance (OAM) of the BS. Design of the BSC is based on two module types: functional module and unit module. The functional module is used to support new services easily and the unit module to increase the system capacity economically. Both modular types are easily achieved by inserting the corresponding modules to the system. Particularly, in order to efficiently support the soft handover which is one of CDMA superior advantages, the BSC adopts a large high-speed packet switch connecting up to 512 BTSs, and thus mobile subscribers can be provided with soft handover in high probability. The BSM is based on a commercial workstation to support OAM functions efficiently and guarantee high reliability of the functions. The BSM uses graphical user interface (GUI) for efficient OAM functions of the BS.     

Light‐Induced Surface Modification of Natural Plant Microparticles: Toward Colloidal Science and Cellular Adhesion Applications

Playing an instrumental role in the life of plants, pollen microparticles are one of the most fascinating biological materials in existence, with abundant and renewable supply, ultrahigh durability, and unique, species‐specific architectural features. Aside from their biological role, pollen microparticles also demonstrate broad utility as functional materials for drug delivery and microencapsulation, and increasingly for emulsion‐type applications. As natural pollen microparticles are predominantly hydrophobic, developing robust surface functionalization strategies to increase surface hydrophilicity would increase the range of colloidal science applications, including opening the door to interfacing microparticles with biological cells. This research investigates the extraction and light‐induced surface modification of discrete pollen microparticles from bee‐collected pollen granules toward achieving functional control over the responses elicited from discrete particles in colloidal science and cellular applications. Ultraviolet–ozone treatment is shown to increase the proportion of surface elemental oxygen and ketones, leading to increased surface hydrophilicity, enhanced particle dispersibility, tunable control over Pickering emulsion characteristics, and enhanced cellular adhesion. In summary, the findings demonstrate that light‐induced surface modification improves the functional properties of pollen microparticles, and such insights also have broad implications across materials science and environmental science applications.