CMOS Outphasing Class-D Amplifier With Chireix Combiner

This letter presents a CMOS outphasing class-D power amplifier (PA) with a Chireix combiner. Two voltage-mode class-D amplifiers used in the outphasing system were designed and implemented with a 0.18-mum CMOS process. By applying the Chireix combiner technique, drain efficiency of the outphasing PA for CDMA signals was improved from 38.6% to 48% while output power was increased from 14.5 to 15.4 dBm with an adjacent channel power ratio of -45 dBc.     

Temporal fairness guarantee in multi-rate wireless LANs for per-flow protection

Wireless LAN technologies such as IEEE 802.11a and 802.11b support high bandwidth and multi-rate data transmission to match the channel condition (i.e., signal to noise ratio). While some wireless packet fair queuing algorithms to achieve the per-flow throughput fairness have been proposed, they are not appropriate for guaranteeing QoS in multi-rate wireless LAN environments. We propose a wireless packet scheduling algorithm that uses the multi-state (multi-rate) wireless channel model and performs packet scheduling by taking into account the channel usage time of each flow. The proposed algorithm aims at per-flow protection by providing equal channel usage time for each flow. To achieve the per-flow protection, we propose a temporally fair scheduling algorithm called Contention-Aware Temporally fair Scheduling (CATS) which provides equal channel usage time for each flow. Channel usage time is defined as the sum of the packet transmission time and the contention overhead time due to the CSMA/CA mechanism. The CATS algorithm provides per-flow protection in wireless LAN environments where the channel qualities of mobile stations are dynamic over time, and where the packet sizes are application-dependent. We also extend CATS to Decentralized-CATS (D-CATS) to provide per-flow protection in the uplink transmission. Using an NS-2 simulation, we evaluate the fairness property of both CATS and D-CATS in various scenarios. Simulation results show that the throughput of mobile stations with stable link conditions is not degraded by the mobility (or link instability) of other stations or by packet size variations. D-CATS also shows less delay and less delay jitter than FIFO. In addition, since D-CATS can coordinate the number of contending mobile stations, the overall throughput is not degraded as the number of mobile stations increases. This work was supported in part by the Brain Korea 21 project of Ministry of Education and in part by the National Research Laboratory project of Ministry of Science and Technology, 2004, Korea.     

Scheduling with accurate communication delay model and scheduler implementation for multiprocessor system-on-chip

In multiprocessor system-on-chip, tasks and communications should be scheduled carefully since their execution order affects the performance of the entire system. When we implement an MPSoC according to the scheduling result, we may find that the scheduling result is not correct or timing constraints are not met unless it takes into account the delays of MPSoC architecture. The unexpected scheduling results are mainly caused from inaccurate communication delays and or runtime scheduler’s overhead. Due to the big complexity of scheduling problem, most previous work neglects the inter-processor communication, or just assumes a fixed delay proportional to the communication volume, without taking into consideration subtle effects like the communication congestion and synchronization delay, which may change dynamically throughout tasks execution. In this paper, we propose an accurate scheduling model of hardware/software communication architecture to improve timing accuracy by taking into account the effects of dynamic software synchronization and detailed hardware resource constraints such as communication congestion and buffer sharing. We also propose a method for runtime scheduler implementation and consider its performance overhead in scheduling. In particular, we introduce efficient hardware and software scheduler architectures. Furthermore, we address the issue of centralized implementation versus distributed implementation of the schedulers. We investigate the pros and cons of the two different scheduler implementations. Through experiments with significant demonstration examples, we show the effectiveness of the proposed approach.     

Substitution effect of pentavalent bismuth ions on the electronic structure and physicochemical properties of perovskite-structured Ba(In0.5Ta0.5−xBix)O3 semiconductors

We have investigated the substitution effect of pentavalent bismuth ions on the electronic structure and physicochemical properties of barium indium tantalate. X-ray diffraction, X-ray absorption spectroscopic, and energy dispersive spectroscopic microprobe analyses reveal that, under oxygen atmosphere of 1 atm, pentavalent Bi ions are successfully stabilized in the octahedral site of the perovskite tantalate lattice. According to diffuse reflectance UV-vis spectroscopic analysis, the Bi substitution gives rise to the significant narrowing of band gap of barium indium tantalate even at a low Bi content of ∼5%, underscoring a high efficiency of Bi substitution in the band gap engineering. Such an effective narrowing of the band gap upon the Bi substitution would be attributable to the lowering of conduction band position due to the high electronegativity of Bi^V substituent. As a result of band gap engineering, the Ba(In_0.5Ta_0.5−xBi_x)O₃ compounds with x ≥ 0.03 can generate photocurrents under visible light irradiation (λ > 420 nm). Based on the present experimental findings, it becomes clear that the substitution of highly electronegative p-block element like Bi^V ion can provide a very powerful tool for tailoring the electronic structure and physicochemical properties of wide band gap semiconductors.     

Multimodal user interface for traffic incident management in control room

Efficient road traffic incident management (TIM) in metropolitan areas is crucial for the smooth traffic flow and the mobility and safety of community. TIM requires fast and accurate collection and retrieval of critical data, such as incident conditions and contact information for the intervention crew, public safety organisations and other resources. Access to critical data by traffic control operators can be facilitated through various human-computer interfaces. The judicious introduction of a multimodal interaction paradigm to the user interfaces (UIs) for incident handling in a metropolitan transport management centre is discussed. Two research prototypes supporting speech and gestural interactions have been developed on the basis of the User Centred Design methodology, and their evaluations have been conducted through user studies. The user studies on the prototypes suggest that multimodal UIs (MMUIs) can provide traffic control operators with intuitive, cognitively efficient ways to record traffic incident conditions, facilitate fast retrieval of contact details, and support time-critical incident handling. The research prototypes described herein represent some initial steps for the longer-term deployment of advanced MMUI systems for emergency management     

A 9‐Bit 80‐MS/s CMOS Pipelined Folding A/D Converter with an Offset Canceling Technique

A 9‐bit 80‐MS/s CMOS pipelined folding analog‐to‐digital converter employing offset‐canceled preamplifiers and a subranging scheme is proposed to extend the resolution of a folding architecture. A fully differential dc‐decoupled structure achieves high linearity in circuit design. The measured differential nonlinearity and integral nonlinearity of the prototype are ×0.6 LSB and ×1.6 LSB, respectively.     

Ultra‐wideband Coexistence with WiBro

Interference effects of ultra‐wideband devices using the frequency band from 3.1 to 10.6 GHz on wireless broadband are evaluated. The ultra‐wideband emission power spectral density that would be necessary to protect a wireless broadband station is considered. Also, an analytic scheme based on a system level simulation of a WiBro system is proposed.     

A Temperature‐Controllable Microelectrode and Its Application to Protein Immobilization

This letter presents a smart integrated microfluidic device which can be applied to actively immobilize proteins on demand. The active component in the device is a temperature‐controllable microelectrode array with a smart polymer film, poly(N‐isopropylacrylamide) (PNIPAAm) which can be thermally switched between hydrophilic and hydrophobic states. It is integrated into a micro hot diaphragm having an integrated micro heater and temperature sensors on a 2‐micrometer‐thick silicon oxide/silicon nitride/silicon oxide (O/N/O) template. Only 36 mW is required to heat the large template area of 2 mm×16 mm to 40°C within 1 second. To relay the stimulus‐response activity to the microelectrode surface, the interface is modified with a smart polymer. For a model biomolecular affinity test, an anti‐6‐(2, 4‐dinitrophenyl) aminohexanoic acid (DNP) antibody protein immobilization on the microelectrodes is demonstrated by fluorescence patterns.     

High speed SOI CMOS image sensor with pinned photodiode on handle wafer

We have fabricated SOI CMOS active pixel image sensor with pinned photodiode on handle wafer. The structure of one pixel is a four-transistor type active pixel image sensor, which consists of a reset and a source follower transistor on seed wafer, and is comprised of a photodiode, a transfer gate, and a floating diffusion on handle wafer. The photodiode could be optimized for better quantum efficiency and low dark currents because the process of a photodiode on handle wafer is independent of that of transistors on seed wafer. Most of the wavelengths are absorbed within the visible range, because the optimized photodiode is located on the handle wafer. The response time of SOI CMOS active pixel sensor was about 2 times faster than that of bulk CMOS active pixel image sensor.     

Evaluation of grounding performance of energized substation by ground current measurement

Substation grounding systems typically build up a large network of various grounding electrodes, which consists of a substation grounding grid, multi-grounded transmission line skywires and distribution line neutral wires. Although the fall-of-potential (FOP) method has been widely used for ground resistance measurement, it is difficult to use the method in case of such a substation grounding system because of the difficulty of interpretation of the measured FOP profile. In this paper, we have presented a practical example of ground resistance measurement in a 154 kV substation under commercial operating condition. Conventional FOP tests and the measurement of ground current splits to each part of the grounding system were conducted simultaneously. A simple interpretation method of FOP profiles, with the measured ground current splits, has been suggested.