Modulating drug release from poly(lactic-co-glycolic) acid microparticles by the addition of alginate and pectin

The aim of the present work is the characterization of PLGA microparticles including biopolymers for the controlled release of tilmicosin, a broad-spectrum antibiotic. Microparticles were prepared using the double-emulsion solvent evaporation technique. The effect of alginate and pectin incorporation over particle size and porosity, encapsulation efficiency (EE) and pH-responsive drug release was evaluated. Formulations presented a mean particle size of 5.5 μm approximately and a drug EE ranged from 22%–57%. PLGA-Alginate particles showed an increased porosity. Tilmicosin release profiles from PLGA and PLGA-biopolymer microparticles were affected by the particular combination of polymers and the pH of the release medium. The experimental data was simulated using a mathematical model, which takes into account the autocatalytic polymer degradation and the different mechanisms of drug transport. The combination of PLGA and biopolymers strongly influenced the morphology of the particles, offering the possibility of controlling the drug release profiles according to the therapy.     

A limit set stabilization by means of the Port Hamiltonian system approach

A solution to the stabilization problem of a compact set by means of the Interconnection and Damping Assignment Passivity‐Based Control methodology, for an affine nonlinear system, was introduced. To this end, we expressed the closed‐loop system as a Port Hamiltonian system, having the property of almost all their trajectories asymptotically converge to a convenient limit set, except for a set of measure zero. It was carried out by solving a partial differential equation (PDE) or single matching condition, which allows the desired energy level or limit set E to be shaped explicitly. The control strategy was tested using the magnetic beam balance system and the pendulum actuated by a direct current motor (DC‐motor), having obtained satisfactory results. Copyright © 2014 John Wiley & Sons, Ltd.     

A Mechanized Proof of the Basic Perturbation Lemma

We present a complete mechanized proof of the result in homological algebra known as basic perturbation lemma. The proof has been carried out in the proof assistant Isabelle, more concretely, in the implementation of higher-order logic (HOL) available in the system. We report on the difficulties found when dealing with abstract algebra in HOL, and also on the ongoing stages of our project to give a certified version of some of the algorithms present in the Kenzo symbolic computation system. J. Aransay was partially supported by Ministerio de Educación y Ciencia, MTM2006/06513, and by Gobierno de La Rioja ANGI2005/19 and J. Rubio was partially supported by Ministerio de Educación y Ciencia, MTM2006/06513, and by Gobierno de La Rioja ANGI2005/19.     

Optimization of biochemical systems through mathematical programming: Methods and applications

In this work we present a general (mono and multiobjective) optimization framework for the technological improvement of biochemical systems. The starting point of the method is a mathematical model in ordinary differential equations (ODEs) of the investigated system, based on qualitative biological knowledge and quantitative experimental data. In the method we take advantage of the special structural features of a family of ODEs called power-law models to reduce the computational complexity of the optimization program. In this way, the genetic manipulation of a biochemical system to meet a certain biotechnological goal can be expressed as an optimization program with some desired properties such as linearity or convexity.The general method of optimization is presented and discussed in its linear and geometric programming versions. We furthermore illustrate the use of the method by several real case studies. We conclude that the technological improvement of microorganisms can be afforded using the combination of mathematical modelling and optimization. The systematic nature of this approach facilitates the redesign of biochemical systems and makes this a predictive exercise rather than a trial-and-error procedure.     

Network interfaces for programmable NICs and multicore platforms

The availability of multicore processors and programmable NICs, such as TOEs (TCP/IP Offloading Engines), provides new opportunities for designing efficient network interfaces to cope with the gap between the improvement rates of link bandwidths and microprocessor performance. This gap poses important challenges related with the high computational requirements associated to the traffic volumes and wider functionality that the network interface has to support. This way, taking into account the rate of link bandwidth improvement and the ever changing and increasing application demands, efficient network interface architectures require scalability and flexibility. An opportunity to reach these goals comes from the exploitation of the parallelism in the communication path by distributing the protocol processing work across processors which are available in the computer, i.e. multicore microprocessors and programmable NICs.Thus, after a brief review of the different solutions that have been previously proposed for speeding up network interfaces, this paper analyzes the onloading and offloading alternatives. Both strategies try to release host CPU cycles by taking advantage of the communication workload execution in other processors present in the node. Nevertheless, whereas onloading uses another general-purpose processor, either included in a chip multiprocessor (CMP) or in a symmetric multiprocessor (SMP), offloading takes advantage of processors in programmable network interface cards (NICs). From our experiments, implemented by using a full-system simulator, we provide a fair and more complete comparison between onloading and offloading. Thus, it is shown that the relative improvement on peak throughput offered by offloading and onloading depends on the rate of application workload to communication overhead, the message sizes, and on the characteristics of the system architecture, more specifically the bandwidth of the buses and the way the NIC is connected to the system processor and memory. In our implementations, offloading provides lower latencies than onloading, although the CPU utilization and interrupts are lower for onloading. Taking into account the conclusions of our experimental results, we propose a hybrid network interface that can take advantage of both, programmable NICs and multicore processors.     

Accelerating network applications by distributed interfaces on heterogeneous multiprocessor architectures

Hosts with several, possibly heterogeneous and/or multicore, processors provide new challenges and opportunities to accelerate applications with high communications bandwidth requirements. Many opportunities to scale these network applications with the increase in the link bandwidths are related to the exploitation of the available parallelism provided by the presence of several processing cores in the servers, not only for computing the workload of the user application but also for decreasing the overhead associated to the network interface and the system software.     

LAMED — A PRNG for EPC Class-1 Generation-2 RFID specification

RFID is a relatively heterogenous radio technology, where it is necessary to put an extra effort on security and privacy-related issues. As early as 2004, some authors suggested the use of a PRNG for increasing security. This was later questioned because many thought a PRNG implementation may go well beyond the very limited computational capabilities of low-cost RFID tags. However, its use has been ratified by EPCGlobal (EPC Class-1 Generation-2) and ISO (ISO/IEC 18000-6C). This motivates our proposal of a new PRNG, named LAMED, which is compliant with the standards and successfully passes several batteries of very demanding randomness tests (ENT, DIEHARD, NIST, and SEXTON). A study of its hardware complexity shows that LAMED can be implemented with slightly less than 1.6 K gates, and that pseudo-random numbers can be generated each 1.8 ms. So we can affirm this is a realist proposal both conforming with the EPC-G1C2 standard, and suitable for low-cost RFID tags.