Stoichiometry Control for the Tuning of Grain Passivation and Domain Distribution in Green Quasi‐2D Metal Halide Perovskite Films and Light‐Emitting Diodes

Quasi‐2D metal halide perovskite films are promising for efficient light‐emitting diodes (LEDs), because of their efficient radiative recombination and suppressed trap‐assisted quenching compared with pure 3D perovskites. However, because of the multidomain polycrystalline nature of solution‐processed quasi‐2D perovskite films, the composition engineering always impacts the emitting properties with complicated mechanisms. Here, defect passivation and domain distribution of quasi‐2D perovskite films prepared with various precursor compositions are systematically studied. As a result, in perovskite films prepared from stoichiometric quasi‐2D precursor compositions, large organic ammonium cations function well as passivators. In comparison, precursor compositions of simply adding large organic halide salt into a 3D perovskite precursor ensure not only the defect passivation but also the effective formation of quasi‐2D perovskite domains, avoiding unfavorable appearance of low‐order domains. Quasi‐2D perovskite films fabricated with a well‐designed precursor composition achieve a high photoluminescence quantum yield of 95.3% and an external quantum efficiency of 14.7% in LEDs.     

An all-digital analog-to-digital converter with 12-/spl mu/V/LSB using moving-average filtering

A compact, high-resolution analog-to-digital converter (ADC) especially for sensors is presented. The basic structure is a completely digital circuit including a ring-delay-line with delay units (DUs), along with a frequency counter, latch, and encoder. The operating principles are: (1) the delay time of the DU is modulated by the analog-to-digital (A/D) conversion voltage and (2) the delay pulse passes through a number of DUs within a sampling (= integration) time and the number of DUs through which the delay pulse passes is output as conversion data. Compact size and high resolution were realized with an ADC having a circuit area of 0.45 mm/sup 2/ (0.8-/spl mu/m CMOS) and a resolution of 12 /spl mu/V (10 kS/s). Its nonlinearity is /spl plusmn/0.1% FS per 200-mV span (1.8-2.0 V), for 14-b resolution. Sample holds are unnecessary and a low-pass filter function removes high-frequency noise simultaneously with A/D conversion. Thus, the combination of this ADC and a digital filter that follows can eliminate an analog prefilter to prevent the aliasing before A/D conversion. Also, both this ADC can be shrunk and operated at low voltages, so it is an ideal means to lower the cost and power consumption. Drift errors can be easily compensated for by digital processing.     

Comparisons of computed mobile phone induced SAR in the SAM phantom to that in anatomically correct models of the human head

The specific absorption rates (SAR) determined computationally in the specific anthropomorphic mannequin (SAM) and anatomically correct models of the human head when exposed to a mobile phone model are compared as part of a study organized by IEEE Standards Coordinating Committee 34, Sub-Committee 2, and Working Group 2, and carried out by an international task force comprising 14 government, academic, and industrial research institutions. The detailed study protocol defined the computational head and mobile phone models. The participants used different finite-difference time-domain software and independently positioned the mobile phone and head models in accordance with the protocol. The results show that when the pinna SAR is calculated separately from the head SAR, SAM produced a higher SAR in the head than the anatomically correct head models. Also the larger (adult) head produced a statistically significant higher peak SAR for both the 1- and 10-g averages than did the smaller (child) head for all conditions of frequency and position.     

微导通孔的电镀填孔技术

本文主介绍了电镀填孔技术,并探讨了DC和PPR电镀填孔技术的优缺点和影响填孔效果的相关因素。     

Small-signal analysis of semiconductor lasers modulated atfrequencies on the order of the beat frequency

A small-signal analysis of direct modulation of laser diodes is presented. The analysis is valid over a wide frequency range, up to the frequency corresponding to the round trip time of the active region. This theory is best for laser diodes with small active regions but with large and complicated optical cavities. Optical resonances may occur in this range, resulting in a large response to direct modulation as a result of interaction of the lasing mode with the optical resonance. This theory can predict the linear response of the laser to direct modulation throughout this frequency range. It also predicts the lower frequency relaxation oscillation effect, thus unifying these different effects with a single treatment. The form of the modulation response is found to be the same as the standard relaxation oscillation formula, modified by a factor the form of which depends on the optics of the laser cavity alone     

Influence of interstripe gain on crosscoupled-mode operation intwin-stripe lasers

Cross-coupled-mode operation in a twin-stripe laser is analyzed with particular concern for interstripe gain. When the interstripe gain of a twin-stripe laser is high, cross-coupled-mode operation is obtained with a cavity longer than the coupling length of the twin-stripe waveguide. The far-field pattern is single peaked and deflected to the low carrier density side. These characteristics are in contrast to those of the previous model without interstripe gain     

New application of laser beam to failure analysis of LSI with multi-metal layers

A new technique for failure analysis of LSI with multi metal layers is described. There is a fabrication technique to form a big and optional window on upper layers using Nd-YAG laser without destroying any electrical function, and to approach the failure point through this window. The failure analysis procedure based on logical flow is presented. Fabrication technique is located in part of this procedure which consists of four steps. Two difficult reasons for approaching the failure point without fabrication technique are described. This difficulty results from line composition and line width. The fabrication procedure using Nd-YAG laser is reported. This procedure is to cover the chip surface with photo resist, and form a big and optional size window on upper layer with laser beam, and finally expose the purposed layer. Three failure analysis examples using this technique are introduced: unformed contact falure mode, Si-noduled failure mode, and isolation destroying failure mode.     

"Pored-domes" of the fenestrated endotheliocyte of the glomerular and peritubular capillaries in the rodent kidney.

The fenestrated endotheliocyte of peritubular and glomerular capillaries in rat and mouse kidneys were observed with SEM and TEM. In the glomerular capillary, so-called "pored-domes" were found not only at the fenestrated areolae but also at the nuclear region of the endotheliocyte. At the region between filtration surface and nuclear region, they accumulated to construct a sponge-like structure. The endotheliocyte of peritubular capillary also showed small "pored-domes". The size and morphology of the pores in the "pored-domes" of glomerular and peritubular capillaries were similar to those of areolae fenestratae of the respective capillary. Based on the findings, we assumed that pored-domes and the sponge-like structure are the reservoir for the fenestrated area of the endotheliocyte to accommodate the rapid expansion of capillary lumen.     

A 1.5-V full-swing BiCMOS logic circuit

A BiCMOS logic circuit applicable to sub-2-V digital circuits has been developed. A transiently saturated full-swing BiCMOS (TS-FS-BiCMOS) logic circuit operates twice as fast as CMOS at 1.5-V supply. A newly developed transient-saturation technique, with which bipolar transistors saturate only during switching periods, is the key to sub-2-V operation because a high-speed full-swing operation is achieved to remove the voltage loss due to the base-emitter turn-on voltage. Both small load dependence and small fan-in dependence of gate delay time are attained with this technique. A two-input gate fabricated with 0.3-μm BiCMOS technology verifies the performance advantage of TS-FS-BiCMOS over other BiCMOS circuits and CMOS at sub 2-V supply     

0.5-μm 3.3-V BiCMOS standard cells with 32-kilobyte cache andten-port register file

BiCMOS standard cell macros, including a 0.5-W 3-ns register file, a 0.6-W 5-ns 32-kbyte cache, a 0.2-W 3-ns table look-aside buffer (TLB), and a 0.1-W 3-ns adder, are designed with a 0.5-μm BiCMOS technology. A supply voltage of 3.3 V is used to achieve low power consumption. Several BiCMOS/CMOS circuits, such as a self-aligned threshold inverter (SATI) sense amplifier and an ECL HIT logic are used to realize high-speed operation at the low supply voltage. The performance of the BiCMOS macros is verified using a fabricated test chip