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1.
The mechanical, morphological behavior and water absorption characteristics of polypropylene (PP) and silica, or PP and rice‐husk, composites have been studied. The silica used in this study as filler was a commercial type produced from soluble glass or rice husks. The compatibilizing effect of PP grafted with monomethyl itaconate (PP‐g‐MMI) and/or with vinyltriethoxysilane (PP‐g‐VTES) as polar monomers on the mechanical properties and water absorption was also investigated. In general, a high loading of the studied fillers in the polymer matrix increases the stiffness and the water absorption capacity. This effect is more noticeable in the tensile modulus of the PP/silica composite with PP‐g‐VTES as compatibilizer. However, the increase of the rice‐husk charge as a natural filler in the PP matrix decreases the stiffness, and in the presence of PP‐g‐MMI as compatibilizer in PP/rice‐husk, the tensile modulus and water absorption of the composite were improved. The better adhesion and phase continuity in the PP/silica and PP/rice‐husk composites with different compatibilizers was confirmed by the morphological study. Copyright © 2004 Society of Chemical Industry  相似文献   
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With the advent of the fifth generation of mobile radio communication by 2020, there will be many challenges such as increasing service demand with low delay in providing billions of end users called the satellite mobile users. It is expected that terrestrial communication systems will be faced with a dense network having many small cells anywhere and anytime. Therefore, there are some remote regions in the world where terrestrial systems cannot provide any services to end users. Furthermore, because of lack of spectral resources, it is very important that the spectrum is shared between satellite systems and terrestrial equipment by a suitable solution to interference management. In this paper, a heterogeneous satellite network that includes low earth orbit (LEO) satellite constellation and terrestrial equipment is proposed to provide low delay services. In this type of structure, interference management based on transmission power control between LEO satellite systems and mobile users is very important for obtaining high throughput. Moreover, in order to mitigate interference, transmission power control is shown based on noncooperative Stackelberg game under many subgames through pricing‐based algorithm and convex optimization method. Finally, the simulation results show that the performance of this study's system model will be improved through the proposed algorithm.  相似文献   
4.
This paper presents an energy‐efficient (low power) prime‐field hyperelliptic curve cryptography (HECC) processor with uniform power draw. The HECC processor performs divisor scalar multiplication on the Jacobian of genus 2 hyperelliptic curves defined over prime fields for arbitrary field and curve parameters. It supports the most frequent case of divisor doubling and addition. The optimized implementation, which is synthesized in a 0.13 μm standard CMOS technology, performs an 81‐bit divisor multiplication in 503 ms consuming only 6.55 μJ of energy (average power consumption is 12.76 μW). In addition, we present a technique to make the power consumption of the HECC processor more uniform and lower the peaks of its power consumption.  相似文献   
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Soft-edge flip-flop (SEFF) based pipelines can improve the performance and energy efficiency of circuits operating in the super-threshold (supply voltage) regime by enabling the opportunistic time borrowing. The application of this technique to the near-threshold regime of operation, however, faces a significant challenge due to large circuit parameter variations that result from manufacturing process imperfections. In particular, delay lines in SEFFs have to be over-designed to provide larger transparency windows to overcome the variation in path delays, which causes them to consume more power. To address this issue, this paper presents a novel way of designing delay lines in SEFFs to have a large enough transparency window size and low power consumption. Two types of linear pipeline design problems using the SEFFs are formulated and solved: (1) designing energy-delay optimal pipelines for the general usage that requires SEFFs to operate in both the near-threshold and super-threshold regimes, and (2) designing minimum energy consumed pipelines for particular use case with a minimum operating frequency constraint. Design methods are presented to derive requisite pipeline design parameters (i.e., depth and sizing of delay lines in SEFFs) and operating conditions (i.e., supply voltage and operating frequency of the design) in presence of process-induced variations. HSPICE simulation results using ISCAS benchmarks demonstrate the efficacy of the presented design methods.  相似文献   
6.
A fully integrated neural recording amplifier with DC input stabilization   总被引:3,自引:0,他引:3  
This paper presents a low-power low-noise fully integrated bandpass operational amplifier for a variety of biomedical neural recording applications. A standard two-stage CMOS amplifier in a closed-loop resistive feedback configuration provides a stable ac gain of 39.3 dB at 1 kHz. A subthreshold PMOS input transistor is utilized to clamp the large and random dc open circuit potentials that normally exist at the electrode-electrolyte interface. The low cutoff frequency of the amplifier is programmable up to 50 Hz, while its high cutoff frequency is measured to be 9.1 kHz. The tolerable dc input range is measured to be at least +/- 0.25 V with a dc rejection factor of at least 29 dB. The amplifier occupies 0.107 mm2 in die area, and dissipates 115 microW from a 3 V power supply. The total measured input-referred noise voltage in the frequency range of 0.1-10 kHz is 7.8 microVrms. It is fabricated using AMI 1.5 microm double-poly double-metal n-well CMOS process. This paper presents full characterization of the dc, ac, and noise performance of this amplifier through in vitro measurements in saline using two different neural recording electrodes.  相似文献   
7.
Lifetime and energy efficiency are important factors in the design of wireless sensor network. A critical issue during data collection is the formation of energy holes near the sink. Sensors which are located near the sink have to participate in relaying data on behalf of other sensors and thus their energy will be depleted very quickly. Mobile sink movement yields the significant performance gained by decreasing the amount of energy consumption. In this paper, we propose an Intelligent Grid Based Data Disseminating protocol for mobile sink in wireless sensor networks. We have utilized a virtual grid as the protocol’s substructure. In our proposed method, cell heads (CHs) will be selected based on the locations of virtual cross points (CPs) and CPs selection is needless to transfer any required data between neighbor nodes. We have optimized CPs selection using linear programming technique in order to increase network lifetime. By selecting the CHs based on our proposed algorithm, data will be disseminated toward the sink. Our data dissemination protocol is simple and has low overhead to construct and maintain. Also, we have presented a new method for sink location update which leads to the least cost in data transfer. Simulation results illustrate that by utilizing hierarchical functionality and selecting appropriate CPs and consequently selecting CHs, energy consumption will be decreased in comparison with other presented methods which directly lead to network lifetime increment. Also by determining an optimal cell size, packet delivery rate will be improved noticeably.  相似文献   
8.
Aggressive CMOS scaling results in low threshold voltage and thin oxide thickness for transistors manufactured in deep submicrometer regime. As a result, reducing the subthreshold and tunneling gate leakage currents has become one of the most important criteria in the design of VLSI circuits. This paper presents a method based on dual- V t and dual- T ox assignment to reduce the total leakage power dissipation of static random access memories (SRAMs) while maintaining their performance. The proposed method is based on the observation that read and write delays of a memory cell in an SRAM block depend on the physical distance of the cell from the sense amplifier and the decoder. Thus, the idea is to deploy different configurations of six-transistor SRAM cells corresponding to different threshold voltage and oxide thickness assignments for the transistors. Unlike other techniques for low-leakage SRAM design, the proposed technique incurs neither area nor delay overhead. In addition, it results in a minor change in the SRAM design flow. The leakage saving achieved by using this technique is a function of the values of the high threshold voltage and the oxide thickness, as well as the number of rows and columns in the cell array. Simulation results with a 65-nm process demonstrate that this technique can reduce the total leakage power dissipation of a 64 times 512 SRAM array by 33% and that of a 32 times 512 SRAM array by 40%.  相似文献   
9.
This paper is concerned with the analysis and optimization of the ground bounce in digital CMOS circuits. First, an analytical method for calculating the ground bounce is presented. The proposed method relies on accurate models of the short-channel MOS device and the chip-package interface parasitics. Next the effect of ground bounce on the propagation delay and the optimum tapering factor of a multistage buffer is discussed and a mathematical relationship for total propagation delay in the presence of the ground bounce is obtained. Effect of an on-chip decoupling capacitor on the ground bounce waveform and circuit speed is analyzed next and a closed form expression for the peak value of the differential-mode component of the ground bounce in terms of the on-chip decoupling capacitor is provided. Finally, a design methodology for controlling the switching times of the output drivers to minimize the ground bounce is presented.  相似文献   
10.
Natural polymer-based sutures have attractive cytocompatibility and degradability in surgical operations. Herein, anionic cellulose nanofibrils (ACNF) and cationic guar gum (CGG) are employed to produce nontoxic CGG/ACNF composite filament with a unique core–shell structure via interfacial polyelectrolyte complexation (IPC) spinning. The comprehensive characterization and application performance of the resultant CGG/ACNF filament as a surgical suture are thoroughly investigated in comparison with silk and PGLA (90% glycolide and 10% l -lactide) sutures in vitro and in vivo, respectively. Results show that the CGG/ACNF filament with the typical core–shell structure and nervation pattern surface exhibits a high orientation index (0.74) and good mechanical properties. The tensile strength and knotting strength of CGG/ACNF suture prepared by twisting CGG/ACNF filaments increase by 69.5%, and CGG/ACNF suture has a similar friction coefficient to silk and PGLA sutures. Moreover, CGG/ACNF suture with antibiosis and cytocompatibility exhibits better growth promotion of cells than silk suture, similar to PGLA suture in vitro. In addition, the stitching experiment of mice with the CGG/ACNF suture further confirms better healing properties and less inflammation in vivo than silk and PGLA sutures do. Hence, the CGG/ACNF suture with a simple preparation method and excellent application properties is promising in surgical operations.  相似文献   
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