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31.
Takayuki Goto Takao Watanabe Kyoichi Kinoshita Azusa Matsuda Masafumi Sera Tetsuo Fukase 《Journal of Low Temperature Physics》1996,105(3-4):401-406
Cu-NMR spectra and the nuclear spin-lattice relaxation rate T
1
-1
have been studied intensively on the bilayer type high-Tc cuprate La1.89Ca1.11Cu2O6+ (La2126). The resonance line shift showed a monotonic decrease with lowering temperature in the normal state, indicating that this compound belongs to the lightly-doped region. The Curie-Weiss temperature dependence of (T1T)–1 in the normal state shows that the pseudo spin-gap does not always exist in the light-doped bilayer systems. 相似文献
32.
Shih-Ying LinShi-Jinn Horng Tzong-Wann KaoChin-Shyurng Fahn Pingzhi FanYuan-Hsin Chen Muhammad Khurram KhanAnu Bourgeois Takao Terano 《Image and vision computing》2011,29(4):272-285
Traditionally, the block-based medial axis transform (BB-MAT) and the chessboard distance transform (CDT) were usually viewed as two completely different image computation problems, especially for three dimensional (3D) space. In fact, there exist some equivalent properties between them. The relationship between both of them is first derived and proved in this paper. One of the significant properties is that CDT for 3D binary image V is equal to BB-MAT for image V' where it denotes the inverse image of V. In a parallel algorithm, a cost is defined as the product of the time complexity and the number of processors used. The main contribution of this work is to reduce the costs of 3D BB-MAT and 3D CDT problems proposed by Wang [65]. Based on the reverse-dominance technique which is redefined from dominance concept, we achieve the computation of the 3D CDT problem by implementing the 3D BB-MAT algorithm first. For a 3D binary image of size N3, our parallel algorithm can be run in O(logN) time using N3 processors on the concurrent read exclusive write (CREW) parallel random access machine (PRAM) model to solve both 3D BB-MAT and 3D CDT problems, respectively. The presented results for the cost are reduced in comparison with those of Wang's. To the best of our knowledge, this work is the lowest costs for the 3D BB-MAT and 3D CDT algorithms known. In parallel algorithms, the running time can be divided into computation time and communication time. The experimental results of the running, communication and computation times for the different problem sizes are implemented in an HP Superdome with SMP/CC-NUMA (symmetric multiprocessor/cache coherent non-uniform memory access) architecture. We conclude that the parallel computer (i.e., SMP/CC-NUMA architecture or cluster system) is more suitable for solving problems with a large amount of input size. 相似文献
33.
Makoto Sakamoto Kaoru Kajisa Naoko Tomozoe Takao Ito Hiroshi Furutani Michio Kono Satoshi Ikeda 《Artificial Life and Robotics》2008,13(1):61-64
In 1997, C.R. Dyer and A. Rosenfeld introduced an acceptor on a two-dimensional pattern (or tape), called the pyramid cellular acceptor, and demonstrated that many useful recognition tasks are executed by pyramid cellular acceptors in time proportional to the
logarithm of the diameter of the input. They also introduced a bottom-up pyramid cellular acceptor which is a restricted version of the pyramid cellular acceptor, and proposed some interesting open problems of the bottom-up
pyramid cellular acceptors. On the other hand, we think that the study of threedimensional automata has been meaningful as
the computational model of three-dimensional information processing such as computer vision, robotics, and so forth. In this
paper, we investigate about bottom-up pyramid cellular acceptors with three-dimensional layers, and show their some accepting
powers.
This work was presented in part at the 13th International Symposium on Artificial Life and Robotics, Oita, Japan, January
31–February 2, 2008 相似文献
34.
For systems with uncertainties, lots of PID parameter tuning methods have been proposed from the view point of the robust stability theory. However, the control performance becomes conservative using robust PID controllers. In this paper, a new two‐degree‐of‐freedom (2DOF) controller, which can improve the tracking properties, is proposed for nonlinear systems. According to the proposed method, the prefilter is designed as the PD compensator whose control parameters are tuned by the idea of a memory‐based modeling (MBM) method. Since the MBM method is a type of local modeling methods for nonlinear systems, PD parameters can be tuned adequately in an online manner corresponding to nonlinear properties. Finally, the effectiveness of the newly proposed control scheme is numerically evaluated on a simulation example. Copyright © 2008 John Wiley and Sons Asia Pte Ltd and Chinese Automatic Control Society 相似文献
35.
Satoru Maegawa Takao Mizusaki Yutaka Hirayoshi Tadashi Kusumoto Akira Hirai 《Journal of Low Temperature Physics》1980,39(1-2):151-171
Nuclear spin-lattice relaxation properties of hcp solid 3He with 4He impurities have been studied. At temperatures below the exchange plateau region, three kinds of relaxation time were observed. To analyze the data, a phenomenological four-bath model was developed, the four baths being the Zeeman bath, the phonon bath, an X-bath, and a Y-bath. The X-bath consists of the exchange bath and a part of the 4He-4He elastic interaction bath. The Y-bath is the main part of the elastic interaction bath. We measured the concentration dependence of the energy constants of all the baths, as well as the temperature and concentration dependences of the three kinds of relaxation time. The relaxation behavior corresponding to the process between the X-bath and the Y-bath could not be expressed by a single exponential function of time and the relaxation rate was strongly dependent on the concentration. This process may be related to the internal thermal equilibrium process within the elastic interaction bath. The impurity-dependent relaxation time between the X-bath and the phonon bath had a temperature dependence of T
–n with n = 7.4±0.3. 相似文献
36.
37.
Many sorting algorithms have been studied in the past, but there are only a few algorithms that can effectively exploit both single‐instruction multiple‐data (SIMD) instructions and thread‐level parallelism. In this paper, we propose a new high‐performance sorting algorithm, called aligned‐access sort (AA‐sort), that exploits both the SIMD instructions and thread‐level parallelism available on today's multicore processors. Our algorithm consists of two phases, an in‐core sorting phase and an out‐of‐core merging phase. The in‐core sorting phase uses our new sorting algorithm that extends combsort to exploit SIMD instructions. The out‐of‐core algorithm is based on mergesort with our novel vectorized merging algorithm. Both phases can take advantage of SIMD instructions. The key to high performance is eliminating unaligned memory accesses that would reduce the effectiveness of SIMD instructions in both phases. We implemented and evaluated the AA‐sort on PowerPC 970MP and Cell Broadband Engine platforms. In summary, a sequential version of the AA‐sort using SIMD instructions outperformed IBM's optimized sequential sorting library by 1.8 times and bitonic mergesort using SIMD instructions by 3.3 times on PowerPC 970MP when sorting 32 million random 32‐bit integers. Also, a parallel version of AA‐sort demonstrated better scalability with increasing numbers of cores than a parallel version of bitonic mergesort on both platforms. Copyright © 2011 John Wiley & Sons, Ltd. 相似文献
38.
In this paper the stress intensity factors are discussed for an inclined elliptical crack near a bimaterial interface. The solution utilizes the body force method and requires Green’s functions for perfectly bonded semi-infinite bodies. The formulation leads to a system of hypersingular integral equation whose unknowns are three modes of crack opening displacements. In the numerical calculation, unknown body force densities are approximated by using fundamental density functions and polynomials. The results show that the present method yields smooth variations of stress intensity factors along the crack front accurately. Distributions of stress intensity factors are presented in tables and figures with varying the shape of crack, distance from the interface, and elastic modulus ratio. It is found that the inclined crack can be evaluated by the models of vertical and parallel cracks within the error of 24% even for the cracks very close to the interface. 相似文献
39.
A break of wiring by stress-migration becomes a problem with an integrated circuit such as LSI. The present study investigates residual stress in SiO2/Cu/TiN film deposited on glass substrates. A TiN layer, as an undercoat, was first deposited on the substrate by arc ion plating and then Cu and SiO2 layers were deposited by plasma coating. The crystal structure and the residual stress in the deposited multi-layer film were investigated using in-lab. X-ray equipment and a synchrotron radiation device that emits ultra-high-intensity X-rays. It was found that the SiO2 film was amorphous and both the Cu and TiN films had a strong {1 1 1} orientation. The Cu and TiN layers in the multi thick (Cu and TiN:1.0 μm)-layer film and multi thin (0.1 μm)-layer film exhibited tensile residual stresses. Both tensile residual stresses in the multi thin-layer film are larger than the multi thick-layer film. After annealing at 400 °C, these tensile residual stresses in both the films increased with increasing the annealing temperature. Surface swelling formations, such as bubbles were observed in the multi thick-layer film. However, in the case of the multi thin-layer films, there was no change in the surface morphology following heat-treatment. 相似文献
40.
Fujiyoshi T. Shiratake S. Nomura S. Nishikawa T. Kitasho Y. Arakida H. Okuda Y. Tsuboi Y. Hamada M. Hara H. Fujita T. Hatori F. Shimazawa T. Yahagi K. Takeda H. Murakata M. Minami F. Kawabe N. Kitahara T. Seta K. Takahashi M. Oowaki Y. Furuyama T. 《Solid-State Circuits, IEEE Journal of》2006,41(1):54-62
A single-chip H.264 and MPEG-4 audio-visual LSI for mobile applications including terrestrial digital broadcasting system (ISDB-T / DVB-H) with a module-wise, dynamic voltage/frequency scaling architecture is presented for the first time. This LSI can keep operating even during the voltage/frequency transition, so there is no performance overhead. It is realized through a dynamic deskewing system and an on-chip voltage regulator with slew rate control. By the combination with traditional low power techniques such as embedded DRAM and clock gating, it consumes only 63 mW in decoding QVGA H.264 video at 15 frames/sec and MPEG-4 AAC LC audio simultaneously. 相似文献