Nonvolatile Memory Effect in Indium Gallium Arsenide-Based Metal–Oxide–Semiconductor Devices Using II–VI Tunnel Insulators

This paper reports the successful use of ZnSe/ZnS/ZnMgS/ZnS/ZnSe as a gate insulator stack for an InGaAs-based metal–oxide–semiconductor (MOS) device, and demonstrates the threshold voltage shift required in nonvolatile memory devices using a floating gate quantum dot layer. An InGaAs-based nonvolatile memory MOS device was fabricated using a high-κ II–VI tunnel insulator stack and self-assembled GeO _x -cladded Ge quantum dots as the charge storage units. A Si₃N₄ layer was used as the control gate insulator. Capacitance–voltage data showed that, after applying a positive voltage to the gate of a MOS device, charges were being stored in the quantum dots. This was shown by the shift in the flat-band/threshold voltage, simulating the write process of a nonvolatile memory device.     

High Diversity Gain MIMO-Antenna for UWB Application with WLAN Notch Band Characteristic Including Human Interface Devices

Wireless Personal Communications - In this paper, a UWB–MIMO antenna with the WLAN band-notch (5.1–5.85 GHz) characteristic is offered. This antenna consists of two radiated...     

A fuzzy logic based buffer management scheme with traffic differentiation support for delay tolerant networks

Delay tolerant networks (DTNs) are an emerging class of wireless networks which enable data delivery even in the absence of end-to-end connectivity. Under these circumstances, message replication may be applied to increase the delivery ratio. The requirement of long term storage and message replication puts a burden on network resources such as buffer and bandwidth. Buffer management is an important issue which greatly affects the performance of routing protocols in DTNs. Two main issues in buffer management are drop decision when buffer overflow occurs and scheduling decision when a transmission opportunity arises. The objective of this paper is to propose an enhancement to the Custom Service Time Scheduling traffic differentiation scheme by integrating it with a fuzzy based buffer ranking mechanism based on three message properties, namely, number of replicas, message size and remaining time-to-live. It uses fuzzy logic to determine outgoing message order and to decide which messages should be discarded within each traffic class queue. Results of simulation study show that the proposed fuzzy logic-based traffic differentiation scheme achieves improved delivery performance over existing traffic differentiation scheme for DTNs.     

Estimating changes in traffic intensity for M/M/1 queueing systems

In this paper, the principle of maximum likelihood is used to estimate change point of traffic intensity for the M/M/1 queueing model. The procedure is illustrated with a simulated example for each possible change in traffic intensity.     

Enhanced photoluminescence from free-standing microstructures fabricated on MBE grown PbSe–PbSrSe MQW structure

Fabrication of microrods from multi-quantum well (MQW) PbSe–PbSrSe structure grown in molecular beam epitaxy (MBE) followed by its morphological as well as optical characterizations are described. Pulsed PL intensity is increased by 64 times per unit surface area from a free-standing MQW microrod mounted on copper heat sink compared with the bulk sample. Enhancement in side emission power due to the higher optical confinement effect during pulsed photoluminescence (PL) from MQW semiconductor microtube inserted in hollow quartz optical fiber signifies that these microstructures are robust in nature and crucial contenders for portable mid-infrared optoelectronic devices to be used in the field of industrial trace-gas sensing.     

Waveguide Cross Section and Background Magnetic Field Tapers for Broadbanding a Gyro-TWT

The gyro-TWT in a cylindrical waveguide of linearly-tapered cross section was analyzed for the gain-frequency response, using the Pierce-type gain equation. The taper in the waveguide cross section was adjusted for wide device bandwidths, either by changing the taper angle, while keeping the interaction length to be constant, or by changing the interaction length, while keeping the initial and final radii of the waveguide constant. Tapering led to the prediction of wide bandwidths, though at the cost of gain, as compared to a non-tapered device. The range of the DC background magnetic flux density relative to its grazing-point value was identified as a crucial parameter for large gains, with appreciable bandwidths, and minimum mode mixing in a tapered device, the latter in general facing more mode competition than a non-tapered device.     

Self-Aligned SiGe MOS-Gate FET with Modulation-Doped Quantum Wire Channel for Millimeter Wave Application

This paper describes a self-aligned SiGe MOS-gate field-effect transistor (FET) having a modulation-doped (MOD) quantum wire channel. An analytical model based on modified charge control equations accounting for the quantum wire channel, is presented predicting the transport characteristics of the MOS-gate MODFET structure. In particular, transport characteristics of devices having strained SiGe layers, realized on Si or Ge substrates, are computed. The transconductance g_m and unity-current gain cutoff frequency (f_T) are also computed as a function of the gate voltage V_G. The calculated values of f_T suggest the operation of one-dimensional SiGe MODFETs to be around 200 GHz range at 77°K, and 120 GHz at 300°K.     

Signal Processing for Biometric Systems [DSP Forum]

This IEEE signal processing magazine (SPM) forum discuses signal processing applications, technologies, requirements, and standardization of biometric systems. The forum members bring their expert insights into issues such as biometric security, privacy, and multibiometric and fusion techniques. The invited forum members are Prof. Anil K. Jain of Michigan State University, Prof. Rama Chellappa of the University of Maryland, Dr. Stark C. Draper of theUniversity of Wisconsin in Madison, Prof. Nasir Memon of Polytechnic University, and Dr. P. Jonathon Phillips of the National Institute of Standards and Technology. The moderator of the forum is Dr. Anthony Vetro of Mitsubishi Electric Research Labs, and associate editor of SPM.     

Novel Quantum Dot Gate FETs and Nonvolatile Memories Using Lattice-Matched II–VI Gate Insulators

This paper presents the successful use of ZnS/ZnMgS and other II–VI layers (lattice-matched or pseudomorphic) as high-k gate dielectrics in the fabrication of quantum dot (QD) gate Si field-effect transistors (FETs) and nonvolatile memory structures. Quantum dot gate FETs and nonvolatile memories have been fabricated in two basic configurations: (1) monodispersed cladded Ge nanocrystals (e.g., GeO _x -cladded-Ge quantum dots) site-specifically self-assembled over the lattice-matched ZnMgS gate insulator in the channel region, and (2) ZnTe-ZnMgTe quantum dots formed by self-organization, using metalorganic chemical vapor-phase deposition (MOCVD), on ZnS-ZnMgS gate insulator layers grown epitaxially on Si substrates. Self-assembled GeO _x -cladded Ge QD gate FETs, exhibiting three-state behavior, are also described. Preliminary results on InGaAs-on-InP FETs, using ZnMgSeTe/ZnSe gate insulator layers, are presented.     

Steganalysis of Network Packet Length Based Data Hiding

Recently, data hiding by modifying network parameters like packet header, payload, and packet length has become popular among researchers. Different algorithms have been proposed during the last few years which have altered the network packets in different ways to embed the data bits. Some of these algorithms modify the network packet length for embedding. Although most of the packet length based embedding schemes try to imitate the normal network traffic distribution, they have altered the statistical distribution of network packet lengths during embedding. These statistical anomalies can be exploited to detect such schemes. In this paper, a second order detection scheme for packet length based steganography has been proposed. A comprehensive set of experiments have been carried out to show that the proposed detection scheme can detect network packet length based steganography with a considerably high accuracy.