A 76-mm2 8-Mb chain ferroelectric memory

This paper demonstrates the first 8-Mb chain ferroelectric RAM (chain FeRAM) with 0,25-μm 2-metal CMOS technology. A small die of 76 mm² and a high average cell/chip area efficiency of 57.4 % have been realized by introducing not only chain architecture but also four new techniques: 1) a one-pitch shift cell realizes small cell size of 5.2 μm²; 2) a new hierarchical wordline architecture reduces row-decoder and plate-driver areas without an extra metal layer; 3) a small-area dummy cell scheme reduces dummy capacitor size to 1/3 of the conventional one; and 4) a new array activation scheme reduces dataline and second amplifier areas. As a result, the chain architecture with these new techniques reduces die size to 65% of that of the conventional FeRAM. Moreover a ferroelectric capacitor overdrive scheme enables sufficient polarization switching, without overbias memory cell array. This scheme lowers the minimum operation voltage by 0.23 V, and enables 2.5-V V_dd operation. Thanks to fast cell plateline drive of chain architecture, the 8-Mb chain FeRAM has achieved the fastest random access time, 40 ns, and read/write cycle time, 70 ns, at 3.0 V so far reported     

Microcavity distributed-feedback laser using dye-doped polymeric thin films

An organic microcavity laser, in which all the stacked polymer layers are doped with pyrromethene-567 dye, is presented. Singlemode laser oscillation at 568 nm was obtained that was located in the middle of the stopband. The lasing threshold was found to be 260 nJ/pulse, which corresponded to 300 muJ/cm² in the pulse energy density     

Wide-wavelength tunable lasers with 100 ghz fsr ring resonators

A widely tunable laser, consisting of a 100 GHz FSR triple-ring resonator and a semiconductor optical amplifier, is presented. The 100 GHz FSR ring resonator makes it possible to demonstrate 96 nm wavelength tuning with stable single-mode operation produced by a large threshold gain difference     

A side-wall transfer-transistor cell (SWATT cell) for highlyreliable multi-level NAND EEPROMs

A multi-level NAND Flash memory cell, using a new Side-WAll Transfer-Transistor (SWATT) structure, has been developed for a high performance and low bit cost Flash EEPROM. With the SWATT cell, a relatively wide threshold voltage (V_th) distribution of about 1.1 V is sufficient for a 4-level memory cell in contrast to a narrow 0.6 V distribution that is required for a conventional 4-level NAND cell. The key technology that allows this wide V_th distribution is the Transfer Transistor which is located at the side wall of the Shallow Trench Isolation (STI) region and is connected in parallel with the floating gate transistor. During read, the Transfer Transistors of the unselected cells (connected in series with the selected cell) function as pass transistors. So, even if the V_th of the unselected floating gate transistor is higher than the control gate voltage, the unselected cell will be in the ON state. As a result, the V_th distribution of the floating gate transistor can be wider and the programming can be faster because the number of program/verify cycles can be reduced. Furthermore, the SWATT cell results in a very small cell size of 0.57 μm² for a 0.35 μm rule. Thus, the SWATT cell combines a small cell size with a multi-level scheme to realize a very low bit cost. This paper describes the process technology and the device performance of the SWATT cell, which can be used to realize NAND EEPROM's of 512 Mbit and beyond     

Limit of optical-frequency comb generation due to materialdispersion

The limit of optical frequency comb (OFC) generation (i.e., the limit of frequency difference measurement) due to the material dispersion in the EO crystal is experimentally studied. By using a modified monolithic OFC generator, we observed the OFC spectrum, and confirmed that the envelope of the OFC around 780 nm extended to a span as wide as 16 nm (or 7.6 THz) reaching the limit of the OFC generation. We also proposed a method of stabilizing the Fabry-Perot cavity for the monolithic OFC generator     

Preparation of CdSSe-ZnS superlattice,SrS, and CdSSe-SrS superlattice by hot-wall epitaxy,and applications to electroluminescent devices

CdSSe (manganese-doped, E_g = 1.9–2.5 eV, lattice constant a = 6.05–5.8A)-ZnS (Eg = 3.56 eV, a = 5.41A) superlattices, SrS (cerium-doped, E = 4.4 eV, a = 6.02A) layers, and CdSSe-SrS (cerium-doped) superlattice layers nave been prepared by hot-wall epitaxy, and the properties and the electroluminescent device characteristics of the active layers are reported. For the superlattices with ZnS, the maximum luminance was 800 cd/m² at an applied sinusoidal voltage (V_o-p = 200 V) with frequency 1kHz, and the wavelength of the spectral peak was 610 nm due to the large strain caused by the lattice mismatch (8–15%) between the CdSSe and ZnS layers. The maximum luminance and Comisson Internationale de Enluminure (CIE) chromaticity of CdS(Mn)-ZnS superlattices and CdSe(Mn)-ZnS superlattice devices were 557cd/m² and (x,y) = (0.58,0.41) and 982 cd/m² and (0.61, 0.38), respectively. For superlattices with SrS, the maximum luminance of the device with the SrS (cerium-doped) active layer was nearly 700 cd/m² at a voltage of 340V. Blue electroluminescent emission was observed in the photon wavelength region less than 450 nm, due to carriers dropping into the quantum wells of the device with the CdSSe-SrS superlattice active layer.     

4*4 directional coupler switch matrix with an InGaAlAs/InAlAs multiquantum well structure

A 4*4 directional coupler switch matrix is developed which uses, for the first time, the quantum confined Stark effect of InGaAlAs/InAlAs multiquantum well structures. The rearrangeable nonblocking 4*4 network with six 2*2 switches is shown to be perfectly functional with switching voltages between 5 and 6 V and crosstalk below -17 dB in all the operation states.<>     

A Si bipolar 1.4-GHz time space switch LSI for B-ISDN

A 155-MB/s 32×32 Si bipolar switch LSI designed for wide application in the broadband ISDN was implemented. The operating speed is 1.4 GHz using an A-BSA Si bipolar process. Its throughput is 5.0 Gb/s by handling four 1.4-GHz interfaces, each of which supports an eight-channel multiplexed data stream. To realize a highly integrated high-speed bipolar LSI, power consumption and chip area should be reduced. Two technologies were developed for the LSI: (1) an active pull-down circuit with an embedded bias circuit in each gate, and (2) a modified standard cell with overlapped cell-channel structure. Using these technologies, total power consumption and chip area were reduced to 60% and 70%, respectively, of what is expected when conventional emitter-coupled logic (ECL) technologies and standard cell structures are used. The LSI evaluation results show that the developed LSI has sufficient performance to realize a large-scale B-ISDN switching system     

Preparation and properties of CuInS2 thin film prepared from electroplated precursor

Thin CuInS₂ films were prepared by sulfurization of Cu/In bi-layers. First, the precursor layer was electroplated onto the treated surface of Mo-coated glass. Observation of the cross-section prepared by focused ion beam (FIB) etching revealed that the void-free film was initially formed on the top surface of the precursor layer and continued to grow until the advancing front of the film reached the Mo layer. The nucleation of voids near the bottom of the CuInS₂ film followed. To determine whether the condition of the Cu/In alloy influences the CuInS₂ quality we investigated the Cu/In alloy state using FIB. We found that the annealed precursor of low Cu/In ratio (1.2) has several voids in the mid position in the layer compared with Cu-rich precursor (1.6). The cross-sectional view of the Cu-rich absorber layer is uniform compared with the low copper absorber layer. Thin film solar cells were fabricated using the CuInS₂ film (Cu/In ratio: 1.2) as an optical absorber layer. It was found that the optimization of a sulfurization period is important in order to improve the cell efficiency. We have not yet obtained good results with high Cu-rich absorber because of a blister problem. This blister was found before sulfurization. So, we are going to solve this blister problem before sulfurization.     

GaAs/AlGaAs directional coupler switch with submillimetre device length

A GaAs/AlGaAs directional coupler switch, for the first time with a device length shorter than 1 mm, has been fabricated by utilising the good controllability of molecular beam epitaxy and reactive ion beam etching. The switching voltage is as low as 5V. The extinction ratio is 17dB for a crossover state and 14dB for a straight-through state.