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The Acid Black 172 dye adsorption on the uncalcined hydroxyapatite nanopowder was investigated. The hydroxyapatite prepared by wet coprecipitation method has high specific surface area of 325 m2/g and crystal sizes smaller than 70 nm. The batch adsorption experiments revealed that under the optimum adsorption conditions (pH 3, hydroxyapatite dosage 2 g/L, initial dye concentration 400 mg/L and temperature 20 °C) the dye removal efficiency was 95.78% after 1 h of adsorption. The adsorption kinetics was best described by the pseudo-second order kinetic model. The intraparticle diffusion model shows that intraparticle diffusion is not the sole rate-limiting step; the mass transfer also influences the adsorption process in its initial period. The Langmuir isotherm model best represented the equilibrium experimental data, and the maximum adsorption capacity (q m ) was 312.5 mg/g.  相似文献   
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Gaussian beam launching is proposed as an alternative to ray-based techniques for propagation channel modeling, and it is implemented and validated in the context of indoor propagation. A rigorous Gabor frame decomposition of source fields is used to represent a radiated field as a superposition of shifted and rotated Gaussian beams, conveniently expressed as complex rays. Beam tracking through multiple reflections and transmissions is straightforward, and fields can then be evaluated by summation of closed form expressions. The parameters of a given transformed Gaussian beam have to be calculated only once for all observation points, leading to easy implementation, and computationally efficient algorithms. Simulations of amplitude–delay profiles, mean excess delay, and RMS delay spread are performed in an indoor environment at 60 GHz and compared to measured and published results.  相似文献   
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A new forage sorghum entitled Pnina was developed in Israel. Pnina, harvested at early milk (EM) and hard dough (HD) stages of maturity, was compared with commercial sorghum variety FS‐5 and a sorghum BMR/Sudan hybrid Nutriplus. Plants grew during summer and were irrigated with 190 mm water. Pnina was semi‐dwarf (1.35 m height) and absolutely resistant to lodging. The tall varieties FS‐5 and Nutriplus suffered at HD from high lodging. Pnina was more leafy than Nutriplus and FS‐5. The dry matter (DM) content of FS‐5 and Nutriplus were at EM below the level recommended for ensilage and elevated slightly at HD, whereas DM content of Pnina was higher. Crop yields of all varieties at HD were similar and ranged between 13.3 and 14.7 t ha?1 DM. Dry matter losses during ensilage and silage pH were similar in the three varieties at HD. In vitro DM digestibility of HD silages ranged between 62.5 and 67.1%. Neutral detergent fiber (NDF) content was higher in Pnina silages. Yields of digestible silage per hectare, were similar in the three varieties harvested at HD (8.4 to 8.8 t ha?1 DM); however, yield of digestible NDF per hectare was higher in Pnina. Data suggest that the new variety Pnina may have field advantage over the other varieties of this study. Copyright © 2005 Society of Chemical Industry  相似文献   
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Recent embedded systems integrate a growing number of intellectual property cores into increasingly large designs. Implementation, prototyping, and verification of such large systems has become very challenging. One of the reasons is that chips/FPGAs resources are limited and therefore it is not always possible to implement the whole design in the traditional system-on-a-chip solutions. The state-of-the-art is to partition such systems into smaller sub-systems to implement each on a separate chip. Consequently, it requires interconnecting separate chips/FPGAs. Since Networks-on-Chip (NoCs) have become common interconnection solutions in embedded designs, we propose to bridge NoC-based SoCs enabling a generic multi-chip systems interconnection. In this context, the contribution of this paper is threefold, (i) we explore the NoC protocol stack to determine the best layer for implementing the off-chip bridge, (ii) we propose a generic hardware architecture for the bridge, and (iii) we develop a new software architecture enabling seamless configuration and communication of multi-chip NoC-based SoCs. Finally, we demonstrate performance, i.e., bandwidth and latency, of the bridge in a multi-FPGA platform, while the bridge guarantees QoS of traffic. The synthesis results indicate the implementation area cost of the bridge is only 1% of Xilinx Virtex6 FPGA.  相似文献   
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Message sequence charts (MSCs) and high-level message sequence charts (HMSCs) are popular formalisms for the specification of communication protocols between asynchronous processes. An important concept in this context is the size of the communication buffers used between processes. Since real systems impose limitations on the capacity (or speed) of communication links, we ask whether a given HMSC can be implemented with respect to a given buffer size imposed by the environment. We introduce four different measures for buffer sizes and investigate for each of these measures the complexity of deciding whether a given MSC (or HMSC, or nested MSC) satisfies a given bound on the buffer size. The complexity of these problems varies between the classes P, NP, and coNP.  相似文献   
109.
In the working space model of machining, an experimental procedure is implemented to determine the elastic behaviour of the machining system. In this paper, a dynamic characterization and vibration analysis has long been used for the detection and identification of the machine tool condition. The natural frequencies of the lathe machining system are required (Ernault HN400??France) according to three different situations with no cutting process are acquired. The system modal analysis is used to identify the natural frequencies. These frequencies are then compared to the ones obtained on the spindle numerical model by finite element method. This work is validated by experimental tests based on measures of the lathe machine tool frequencies domain. The main objective is to identify a procedure giving the natural frequency values for the machine tool components, in order to establish a better condition in the cutting process of the machine tool.  相似文献   
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We present the first delay-fault testing approach for Field Programmable Gate Arrays (FPGAs), applicable for on-line testing as well as for off-line manufacturing and system-level testing. Our approach is based on Built-In Self-Test (BIST), it is comprehensive, and does not require expensive external test equipment (ATE). We have successfully implemented this BIST approach for delay-fault testing on the Lattice ORCA 2C and Xilinx Spartan FPGAs.  相似文献   
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