Quasi-cyclic LDPC codes for fast encoding

In this correspondence we present a special class of quasi-cyclic low-density parity-check (QC-LDPC) codes, called block-type LDPC (B-LDPC) codes, which have an efficient encoding algorithm due to the simple structure of their parity-check matrices. Since the parity-check matrix of a QC-LDPC code consists of circulant permutation matrices or the zero matrix, the required memory for storing it can be significantly reduced, as compared with randomly constructed LDPC codes. We show that the girth of a QC-LDPC code is upper-bounded by a certain number which is determined by the positions of circulant permutation matrices. The B-LDPC codes are constructed as irregular QC-LDPC codes with parity-check matrices of an almost lower triangular form so that they have an efficient encoding algorithm, good noise threshold, and low error floor. Their encoding complexity is linearly scaled regardless of the size of circulant permutation matrices.     

Timing ultra-wideband signals with dirty templates

Ultra-wideband (UWB) technology for indoor wireless communications promises high data rates with low-complexity transceivers. Rapid timing synchronization constitutes a major challenge in realizing these promises. In this paper, we establish a novel synchronization criterion that we term "timing with dirty templates" (TDT), based on which we develop and test timing algorithms in both data-aided (DA) and nondata-aided modes. For the DA mode, we design a training pattern, which turns out to not only speed up synchronization, but also enable timing in a multiuser environment. Based on simple integrate-and-dump operations over the symbol duration, our TDT algorithms remain operational in practical UWB settings. They are also readily applicable to narrowband systems when intersymbol interference is avoided. Simulations confirm performance improvement of TDT relative to existing alternatives in terms of mean square error and bit-error rate.     

超深亚微米LDD nMOSFET中的非幸运电子模型效应

通过对采用0.18μm CMOS工艺制造的两组不同沟道长度和栅氧厚度的LDD器件电应力退化实验发现,短沟薄栅氧LDD nMOSFET(Lg=0.18μm,Tox=3.2nm)在沟道热载流子(CHC)应力下的器件寿命比在漏雪崩热载流子(DAHC)应力下的器件寿命要短,这与通常认为的DAHC应力(最大衬底电流应力)下器件退化最严重的理论不一致.因此,这种热载流子应力导致的器件退化机理不能用幸运电子模型(LEM)的框架理论来解释.认为这种"非幸运电子模型效应"是由于最大碰撞电离区附近具有高能量的沟道热电子,在Si-SiO2界面产生界面陷阱(界面态)的区域,由Si-SiO2界面的栅和漏的重叠区移至沟道与LDD区的交界处以及更趋于沟道界面的运动引起的.     

斜坡电流测试应用与比较方法研究

讨论了斜坡电流测试的相关参数如电流斜坡速率、步长及电流倍增速率对测试结果击穿电荷具有的严重影响。指出斜坡电流测试中各个参数的设定、影响及其相关性,使斜坡电流测试的结果具有可比较性。同时,讨论了由于斜坡电流测试本身的特性,击穿电荷具有非连续性,针对击穿电荷的非连续性,提供了一种统计上的数据处理方法,并且根据工程上不同的定性比较结果提供了不同的统计比较方法,可以对非连续的斜坡电流测试结果进行定量的统计比较。在产品验证或生产线出现异常时,能够进行统计上的比较,给出定量的结果。据此能对生产线的稳定性或异常事件对产品的影响给出明确的结论,为受影响的产品的处置提供定量的数据支持。这是首次对斜坡电流测试数据的统计定量分析。     

一种用于16位流水线ADC的多比特子DAC电容失配校准方法

多比特子DAC的电容失配误差在流水线AIX:输出中引入非线性误差,不仅严重降低AEK、转换精腰.而且通常的校准技术无法对非线性误差进行校准.针对这种情况,本文提出了一种用于16位流水线ADC的多比特子DAC电容失配校准方法.该设计误差提取方案在流片后测试得到电容失配误差.进而计算不同输入情况下电容失配导致的MDAC输出误差,根据后级的误差补偿电路将误差转换为卡乏准码并存储在芯片中,对电容失配导致的流水级输出误差进行校准.仿真结果表明.卡《准后信噪失真比SINAD为93.34 dB.无杂散动态范围SFDR为117.86 dB,有效精度EN()B从12.63 bit提高到15.26 bit.     

SCPI与数据库结合在ECU自动测试系统中的应用

在汽车行业蓬勃发展的今天,ECU的功能开发已经成为汽车厂商的核心竞争力。因此ECU的功能检测在ECU的研发中就起着至关重要的作用。ECU自动测试系统是在以Agilent设备为硬件的基础上,将SCPI指令与数据库相结合,在VC＋＋环境下设计的一套全自动ECU测试系统,为ECU的性能评测提供了可靠的依据,极大地提高了对汽车ECU的检测效率。     

一种简易温控智能风扇控制系统的设计

为了实现温度对电风扇的智能控制,设计并制作了一种以AT89C51为控制核心的简易智能风扇控制系统,包括硬件和软件两部分,重点介绍DS18B20对温度检测的方法及利用温度如何实现风扇的智能控制.该系统通过仿真和实物测试,可实现温度的显示及根据温度智能控制风扇的开启和关闭,且具有电路结构简单、操作客易、硬件少、成本低等特点.     

Dual-mode gain control for a 1?V CMOS hearing aid device with enhanced accuracy and energy-efficiency

A dual-mode gain control (DMGC) technique is presented for accurate and energy-efficient pre-amplification in the front-end system of a hearing aid chip. Compared with the conventional automatic gain control (AGC) approach, the DMGC approach is characterized by an amplification switching mechanism between the pro-linearity discrete gain setting mode and the energy-efficient AGC mode. Thus, the total harmonic distortion (THD) should be significantly improved without incurring any degradation concerning other performances parameters (e.g. gain, noise and power consumption). In order to further enhance the system power efficiency, a self current-adapting (SCA) circuit design technique is proposed. Such SCA circuits are capable of automatically adjusting the bias current in accordance with the sound level. A prototype chip was designed with a 0.13???m standard CMOS process and tested with 1?V supply voltage. The measurement results show that, for a typical output level of 500?mV_p-p, the THD is somewhere below ?64?dB, achieving approximately ten times reduction compared to the previously reported works. The power consumption of less than 45???W has also been obtained. In addition, the typical input referred noise is only 2???V_rms and the maximum gain attainable is up to 39?dB.     

侧墙技术在相变存储器中的应用

从相变存储器(phase change random access memory,PCRAM)的基本结构和工作原理出发,首先介绍了PCRAM的技术优势、面临的技术挑战、常用的解决策略以及存在的相应问题;接着阐述了在微电子加工中广泛应用的关键工艺——侧墙技术,并将其在PCRAM中的应用成果进行了分类;然后从加热电极的制备、相变材料限制结构的制备、新相变材料的制备与表征和器件间互联等4个方面展开叙述;最后展望了该技术在相变存储领域应用发展的趋势。侧墙技术因其具备自对准的特点,制备工艺可控性好,制备精度不依赖于光刻精度,在纳米技术飞速发展的今天,侧墙技术将会在更高精度上发挥其作用。     

一种ANDSF获取接入网动态信息的方法

下一代异构无线网络环境是宽带移动无线接入和异构分布的网络,如何减少切换时延实现无缝切换是当前需要解决的问题。文章针对在切换之前如何获取有效的接入网信息提出了一种新的方法,即一种ANDSF(接入网发现和选择功能)获取接入网动态信息的方法,该方法可以保证ANDSF中接入网信息及时准确。然后介绍ANDSF功能实体,分析其工作原理,指出其不足,并提出改进方法。