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71.
Dye‐loaded AlPO4‐5 single crystals were prepared by microwave‐assisted hydrothermal synthesis from a batch, containing a mixture of three chromophores (Coumarin 40, Rhodamine BE50, and Oxazine 1) differing in their absorption range, molecular dimensions, and solubilities. Confocal fluorescence images reveal a spatial separation effect of the dye molecules, where the slimmer, more‐soluble dye molecule (Coumarin 40) is uniformly distributed in the body of the single crystal, and the bulky and/or less‐soluble ones (Rhodamine BE50, Oxazine 1) are situated in distinct domains. Visible spectra show good panchromatic absorption of visible light. Fluorescence lifetime measurements indicate the presence of an energy transfer cascade of the entirely fixed dye molecules from Coumarin 40 to Oxazine 1. The transfer mechanism is predominantly radiative.  相似文献   
72.
Quadrature sigma-delta analog-to-digital converters require a feedback path for both the I and the Q parts of the complex feedback signal. If two separate multibit feedback digital-to-analog converters (DACs) are used, mismatch among the unit DAC elements leads to additional mismatch noise in the output spectrum as well as an I/Q imbalance. This paper proposes new quadrature bandpass (QBP) mismatch shaping techniques. In our approach, the I and Q DACs are merged into one complex DAC, which leads to near-perfect I/Q balance. To select the unit DAC elements of the complex multibit DAC, the well-known butterfly shuffler and tree structure are generalized towards a complex structure, and necessary constraints for their correct functioning are derived. Next, a very efficient first-order QBP shaper implementation is proposed. Finally, the newly presented complex structures are simulated to prove their effectiveness and are compared with each other with respect to performance  相似文献   
73.
Globally asynchronous, locally synchronous (GALS) systems-on-chip (SoCs) may be prone to synchronization failures if the delay of their locally-generated clock tree is not considered. This paper presents an in-depth analysis of the problem and proposes a novel solution. The problem is analyzed considering the magnitude of clock tree delays, the cycle times of the GALS module, and the complexity of the asynchronous interface controllers using a timed signal transition graph (STG) approach. In some cases, the problem can be solved by extracting all the delays and verifying whether the system is susceptible to metastability. In other cases, when high data bandwidth is not required, matched-delay asynchronous ports may be employed. A novel architecture for synchronizing inter-modular communications in GALS, based on locally delayed latching (LDL), is described. LDL synchronization does not require pausable clocking, is insensitive to clock tree delays, and supports high data rates. It replaces complex global timing constraints with simpler localized ones. Three different LDL ports are presented. The risk of metastability in the synchronizer is analyzed in a technology-independent manner  相似文献   
74.
Self-induced effects in a passive polarization-independent vertical-cavity semiconductor gate are investigated numerically and experimentally. We demonstrate all-optical seed-pulse extraction for synchronization of differential phase-shift keying and ON-OFF keying packets at 10 Gb/s. Our results provide evidence that vertical-cavity gates, exploiting saturable absorption in semiconductor quantum-wells, exhibit attractive performances in terms of efficiency, power consumption, and polarization independency.  相似文献   
75.
This paper provides an overview of the main aspects of modern fluorescence microscopy. It covers the principles of fluorescence and highlights the key discoveries in the history of fluorescence microscopy. The paper also discusses the optics of fluorescence microscopes and examines the various types of detectors. It also discusses the signal and image processing challenges in fluorescence microscopy and highlights some of the present developments and future trends in the field.  相似文献   
76.
77.
The alternating-direction implicit finite-difference time-domain (ADI-FDTD) technique is an unconditionally stable time-domain numerical scheme, allowing the /spl Delta/t time step to be increased beyond the Courant-Friedrichs-Lewy limit. Execution time of a simulation is inversely proportional to /spl Delta/t, and as such, increasing /spl Delta/t results in a decrease of execution time. The ADI-FDTD technique greatly increases the utility of the FDTD technique for electromagnetic compatibility problems. Once the basics of the ADI-FDTD technique are presented and the differences of the relative accuracy of ADI-FDTD and standard FDTD are discussed, the problems that benefit greatly from ADI-FDTD are described. A discussion is given on the true time savings of applying the ADI-FDTD technique. The feasibility of using higher order spatial and temporal techniques with ADI-FDTD is presented. The incorporation of frequency dependent material properties (material dispersion) into ADI-FDTD is also presented. The material dispersion scheme is implemented into a one-dimensional and three-dimensional problem space. The scheme is shown to be both accurate and unconditionally stable.  相似文献   
78.
In this paper a digital filter is proposed for the generation of smooth set points for motion control systems. The proposed nonlinear filter produces profiles with bounded velocity and acceleration starting from rough reference signals (steps and ramps). An actual implementation of the filter for a tile printing machine is presented and experimental results are reported.  相似文献   
79.
Managing sewerage systems is a highly complex task due to the dynamic nature of the facilities. Their performance strongly depends on the know-how applied by the operators. In order to define optimal operational settings, two decision support tools based on mathematical models have been developed. Moreover, easy-to-use interfaces have been created as well, aiding operators who presumably do not have the necessary skills to use modelling software. The two developed programs simulate the behaviour of both wastewater treatment plants (WWTP) and sewer network systems, respectively. They have essentially the same structure, including raw data management and statistical analysis, a simulation layer using the application programming interface of the applied software and a layer responsible for the representation of the obtained results. Four user modes are provided in the two software including the simulation of historical data using the applied and novel operational settings, as well as modes concerning prediction of possible operation periods and updates. Concerning the WWTP software, it was successfully installed in Nantes (France) in June 2004. Moreover, the one managing sewer networks has been deployed in Saint-Malo (France) in January 2005. This paper presents the structure of the developed software and the first results obtained during the commissioning phase.  相似文献   
80.
A 1 V switched-capacitor (SC) bandpass sigma-delta (/spl Sigma//spl Delta/) modulator is realized using a high-speed switched-opamp (SO) technique with a sampling frequency of up to 50 MHz, which is improved ten times more than prior 1 V SO designs and comparable to the performance of the state-of-the-art SC circuits that operate at much higher supply voltages. On the system level, a fast-settling double-sampling SC biquadratic filter architecture is proposed to achieve high-speed operation. A low-voltage double-sampling finite-gain-compensation technique is employed to realize a high-resolution /spl Sigma//spl Delta/ modulator using only low-DC-gain opamps to maximize the speed and to reduce power dissipation. On the circuit level, a fast-switching methodology is proposed for the design of the switchable opamps to achieve a switching frequency up to 50 MHz. Implemented in a 0.35-/spl mu/m CMOS process (V/sub TP/=0.82 V and V/sub TN/=0.65 V) and at 1 V supply, the modulator achieves a measured peak signal-to-noise-and-distortion ratio (SNDR) of 42.3 dB at 10.7 MHz with a signal bandwidth of 200 kHz, while dissipating 12 mW and occupying a chip area of 1.3 mm/sup 2/.  相似文献   
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