Deep-submicrometer CMOS technology with reoxidized or annealednitrided-oxide gate dielectrics prepared by rapid thermalprocessing

Deep submicrometer CMOSFETs with re-annealed nitride-oxide gate dielectrics have been demonstrated to satisfy 3.3-V operation, unlike conventional oxide FETs. The 1/4-μm re-annealed nitrided-oxide CMOS devices achieve (1) an improved saturation transconductance g _m of ~250 μS/μm for n-FETs together with acceptably small degradation in p-FET g_m resulting in a CMOS gate delay time of 55 ps/stage comparable or superior to the device/circuit performance of oxide FETs, and (2) device lifetimes improved by ~100 times to exceed 10 years with respect to both ON- and OFF-state hot-carrier reliability for n-FETs as well as gate-dielectric integrity together with unchanged p-FET hot-carrier reliability, all at 3.3-V operation. To achieve these CMOS performance/reliability improvements, both a light nitridation and subsequent re-annealing in O ₂ (reoxidation) or in N₂ (inert-annealing) are found to be crucial     

Thermal stability of indium-tin-oxide/n-GaAs Schottky diodes

The thermal degradation of ITO Schottky contacts on GaAs has been studied. The rectifying contacts show rapid degradation with heating and could have serious implications for optoelectronic devices that operate at elevated temperatures.<>     

CMOS-compatible lateral bipolar transistor for BiCMOS technology.II. Experimental results

For Pt.I see ibid., vol.39, no.4, p.948-51 (1992). Characteristics of a CMOS-compatible lateral bipolar transistor suitable for low-cost and high-speed BiCMOS LSIs are described. The proposed transistor has a structure analogous to that of the NMOS transistor, which employs a source and drain self-aligned structure to form an emitter and collector. The obtained values of h_FE, BV_CEO, R _CS, f_Tmax, and r_bb', are 20, 7 V, 50 Ω, 6.3 GHz, and 450 Ω, respectively. Moreover, delay times of a two-input NAND BiCMOS gate circuit are 0.28 ns when unloaded, and 0.42 and 0.53 ns when load capacitances are 1 and 2 pF, respectively. These values are comparable to those for BiCMOS circuits using the conventional vertical bipolar transistors     

Gain-coupled distributed feedback semiconductor lasers with anabsorptive conduction-type inverted grating

A gain-coupled (GC) distributed feedback (DFB) semiconductor laser with an absorptive conduction-type-inverted grating is proposed. Devices based on GaAlAs/GaAs materials are fabricated using two-step OMVPE. By inverting the conduction type of the absorptive region, threshold current is lowered by 10 mA, which is to compensate for the threshold increase due to extra absorption. In addition, nonlinear output property associated with the saturable nature of the absorption is eliminated. An ultralow chirping capability under gain switching high speed modulation and the narrow linewidth nature of this laser are experimentally studied     

Consequences of structural disorder on laser properties in quantumwire lasers

The effect of interface-roughness-related disorder on the electronic and optoelectronic properties of a quantum wire structure are studied. It is seen that the disorder causes strong localization in the quasi-one-dimensional system. While the electronic states are seriously perturbed, the density of states is not affected drastically. Optoelectronic properties as reflected in the interband transition related phenomenon are not found to suffer significant deterioration as a result of the disorder. However, the results suggest that intraband relaxation processes may be seriously affected because of electron (hole) states being localized in different regions of the wire     

Bistatic radar scattering by a chaff cloud

The bistatic radar scattering cross section of a chaff cloud is investigated in the ground-based system for arbitrarily polarized transmitters and receivers. The chaff cloud considered consists of a large number of identical thin conducting wires whose thickness is very small compared to their length and to the wavelength. Numerical results for bistatic cross sections for the cases of orientations uniform in azimuth and Gaussian in elevation, and also for uniformly random orientation in both azimuth and in elevation are presented in the form of three-dimensional graphs, for a few typical examples     

Evaluation and improvement of fault coverage of conformance testingby UIO sequences

The fault coverage of testing protocols using unique input/output (UIO) sequences is analyzed. UIO sequences can be efficiently employed in checking the conformance specifications of protocols by using transition testing. The test sequence is found using the rural Chinese postman tour algorithm. A comprehensive fault model is developed, and analytical expressions are given for the fault coverage. The conditions for undetectability are analyzed, and a new algorithm is proposed. Simulation results and illustrative examples are presented. Overhead issues are discussed, and significant improvements are shown for achieving 100% fault coverage. The major advantage of the proposed approach is that it provides the theoretical basis for fault coverage evaluation of protocol testing using UIO sequences     

Efficient algorithms for SS/TDMA scheduling

Efficient scheduling algorithms for the slot assignment problem in a satellite-switched time-division multiple-access (SS/TDMA) system are presented. This problem is translated into a modified open-shop scheduling problem, allowing the use of known optimal algorithms. Their complexity is expressed as a function of the following parameters: the number of nonzero entries in the demand matrix, the number of uplinks, and the number of downlinks. According to the values of these parameters, the algorithm with the lowest computational complexity can be adopted. Although the computational complexity of previously published algorithms is drastically reduced, simulation results show that the results are close to previously presented solutions in terms of the assignment duration and the number of switching matrices     

An ultraminiature CMOS pressure sensor for a multiplexedcardiovascular catheter

A multiplexed ultraminiature pressure sensor designed for use in a cardiovascular catheter is described. The sensor operates from only two loads, which are shared by two sensors per catheter. The sensing chip is 350 μm wide by 1.4 mm long by 100 μm thick. CMOS readout circuitry at the sensing site converts applied pressure to a frequency variation in the supply current, which is detected at the end of the catheter by a microprocessor-controlled interface. The nominal pressure sensitivity is 2 kHz/fF about a zero-pressure output frequency of 2.7 MHz. This on-site circuitry contains two reference capacitors which allow external compensation for nonlinearity and temperature sensitivity and has an idle-state power dissipation of less than 50 μW. With the transducer sealed at ambient pressure, the device can resolve pressure variations of about 3 mmHg, while vacuum-sealed devices do considerably better and should permit <2 mmHg resolution in practical systems     

Source-to-drain nonuniformly doped channel (NUDC) MOSFET structuresfor high current drivability and threshold voltage controllability

The source-to-drain nonuniformly doped channel (NUDC) MOSFET has been investigated to improve the aggravation of the V_th lowering characteristics and to prevent the degradation of the current drivability. The basic concept is to change the impurity ions to control the threshold voltage, which are doped uniformly along the channel in the conventional channel MOSFET, to a nonuniform profile of concentration. The MOSFET was fabricated by using the oblique rotating ion implantation technique. As a result, the V_th lowering at 0.4-μm gate length of the NUDC MOSFET is drastically suppressed both in the linear region and in the saturation region as compared with that of the conventional channel MOSFET. Also, the maximum carrier mobility at 0.4-μm gate length is improved by about 20.0%. Furthermore, the drain current is increased by about 20.0% at 0.4-μm gate length