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51.
中频反应溅射SiO2膜与直流溅射ITO膜的在线联镀 总被引:2,自引:2,他引:0
多数ITO透明导电玻璃生产线在实现SiO2膜与ITO膜在线联镀时,应用SiO2靶射频溅射沉积SiO2膜工艺和ITO靶直流溅射沉积ITO膜工艺,如果SiO2膜应用硅靶反应磁控溅射工艺,存在这种工艺是否可以与ITO靶直流溅射沉积ITO膜工艺在线联用以及如何实现联用的问题。作者对现有的生产线进行了改造设计、加工,做了大量实验、质谱分析和多项测试研究,成功地实现反应溅射SiO2膜与ITO膜在线联镀,做到SiO2镀膜室的工作状态的变化基本上不影响ITO镀膜室的工艺条件。 相似文献
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DO浓度对SUFR系统同步硝化反硝化的影响 总被引:1,自引:1,他引:0
采用螺旋升流式反应器(SUFR)处理生活污水,考察了好氧反应池中DO浓度对其同步硝化反硝化的影响。结果表明,在好氧反应池上部溶解氧浓度为3.0~3.5mg/L时,发生了明显的同步硝化反硝化现象,其对TN的去除量占SUFR系统对TN去除总量的16%左右;好氧反应池中的同步硝化反硝化反应只发生在池的下部,其中、上部只进行了好氧硝化反应;SUFR系统中好氧反应池上部的最佳溶解氧浓度范围为3.0~3.5mg/L,此时系统的硝化和反硝化效果最佳,好氧反应池中的脱氮效果也较好,系统对TN的去除率〉84%。 相似文献
55.
Hsin-Yi Lai Chin-Tzwu Huang 《The International Journal of Advanced Manufacturing Technology》2007,31(11-12):1109-1126
This paper presents a new MSDI (mold surface data integration) method for presenting ruled mold-surface data for CAPP applications. The method makes use of adjacency and feature-data matrices to establish a framework of feature-based data. The MSDI method enables the storage, retrieval and operations of geometries, topologies, and machining information of a given ruled mold surface. The matrices of adjacency and feature-data effectively represent the relations. Boolean algebra and group technology (GT) methods are introduced to generate the desired process plans. A sample mold made of ruled surfaces is made and used to show the effectiveness of the proposed data representation and the integrated mold surface processing method. A compact computer program is implemented to enhance the speed and accuracy of the MSDI method. The numerical results indicate that the mold surface decomposition and integration procedure presented in this paper are systematic and effective. The paper provides a novel modular mold surface modeling tool and procedure that can be further extended to accommodate more features appearing in complicated ruled mold surfaces. 相似文献
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Chenn-Jung Huang Wei-Kuang Lai Sheng-Yu Hsiao Hao-Yu Liu Rui-Lin Luo 《International Journal of Wireless Information Networks》2004,11(3):131-146
In this paper, a routing protocol which utilizes the characteristics of Bluetooth technology is proposed for Bluetooth-based mobile ad hoc networks. The routing tables are maintained in the master devices and the routing zone radius for each table is adjusted dynamically by using evolving fuzzy neural networks. Observing there exists some useless routing packets which are helpless to build the routing path and increase the network loads in the existing ad hoc routing protocols, we selectively use multiple unicasts or one broadcast when the destination device is out of the routing zone radius coverage of the routing table. The simulation results show that the dynamic adjustment of the routing table size in each master device results in much less reply time of routing request, fewer request packets and useless packets compared with two representative protocols, Zone Routing Protocol and Dynamic Source Routing. 相似文献
58.
Yen-Jen Chang Shanq-Jang Ruan Feipei Lai 《Very Large Scale Integration (VLSI) Systems, IEEE Transactions on》2003,11(4):568-580
Power consumption is an increasingly pressing problem in modern processor design. Since the on-chip caches usually consume a significant amount of power, it is one of the most attractive targets for power reduction. This paper presents a two-level filter scheme, which consists of the L1 and L2 filters, to reduce the power consumption of the on-chip cache. The main idea of the proposed scheme is motivated by the substantial unnecessary activities in conventional cache architecture. We use a single block buffer as the L1 filter to eliminate the unnecessary cache accesses. In the L2 filter, we then propose a new sentry-tag architecture to further filter out the unnecessary way activities in case of the L1 filter miss. We use SimpleScalar to simulate the SPEC2000 benchmarks and perform the HSPICE simulations to evaluate the proposed architecture. Experimental results show that the two-level filter scheme can effectively reduce the cache power consumption by eliminating most unnecessary cache activities, while the compromise of system performance is negligible. Compared to a conventional instruction cache (32 kB, two-way) implemented with only the L1 filter, the use of a two-level filter can result in roughly 30% reduction in total cache power consumption. Similarly, compared to a conventional data cache (32 kB, four-way) implemented with only the L1 filter, the total cache power reduction is approximately 46%. 相似文献
59.
Nener B.D. Lai S.T. Faraone L. Nassibian A.G. 《IEEE transactions on instrumentation and measurement》1993,42(5):913-919
A method of directly evaluating the activation energy ΔE, capture cross section σ, and density NT, of deep-level traps from the pulsed reverse bias capacitance transient is described. The main advantages of this technique are that it requires only a single temperature scan, and it can resolve nonexponential transients due to closely-spaced energy levels. The test samples used for this paper consisted of Schottky diodes fabricated on nonirradiated and 1-MeV electron-irradiated n-type VPE (vapor-phase epitaxy) GaAs wafers. The well known EL2 trap was identified with ΔE of 0.81 eV, and σ n of 1.0×10-13 cm2 for the nonirradiated sample. These values were found to be in good agreement with published data using established, conventional DLTS techniques. For the irradiated samples a nonexponential capacitance transient was found in the EL2 range of temperatures. The discussed technique was able to resolve two closely spaced deep levels lying at Ec-0.81 eV and Ec-0.84 eV, and with capture cross sections of 1.5×10-13 cm2 and 2.5×10-12 cm2, respectively 相似文献
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