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81.
82.
To meet both flexibility and performance requirements, particularly when implementing high-end real-time image/video processing algorithms, the paper proposes to combine the application specific instruction-set processor (ASIP) paradigm with the reconfigurable hardware one. As case studies, the design of partially reconfigurable ASIP (r-ASIP) architectures is presented for two classes of algorithms with widespread diffusion in image/video processing: motion estimation and retinex filtering. Design optimizations are addressed at both algorithmic and architectural levels. Special processor concepts used to trade-off performance versus flexibility and to enable new features of post-fabrication configurability are shown. Silicon implementation results are compared to known ASIC, DSP or reconfigurable designs; the proposed r-ASIPs stand for their better performance–flexibility figures in the respective algorithmic class.
Luca FanucciEmail:

Sergio Saponara   got the Laurea degree, cum laude, and the Ph.D. in Electronic Engineering from the University of Pisa in 1999 and 2003, respectively. In 2002, he was with IMEC, Leuven (B), as Marie Curie Research Fellow. Since 2001, he collaborates with Consorzio Pisa Ricerche-TEAM in Pisa. He is senior researcher at the University of Pisa in the field of VLSI circuits and systems for telecom, multimedia, space and automotive applications. He is co-author of more than 80 scientific publications. He holds the chair of electronic systems for automotive and automation at the Faculty of Engineering. Michele Casula   received the Laurea degree in Electronic Engineering from the University of Pisa in 2005. Since 2006, he is pursuing a Ph.D. degree in Information Engineering at the same university. His current interests involve VLSI circuits design, computer graphics, and Network-on-Chips. Luca Fanucci    received the Laurea degree and the Ph.D. degree in Electronic Engineering from the University of Pisa in 1992 and 1996, respectively. From 1992 to 1996, he was with ESA/ESTEC, Noordwijk (NL), as a research fellow. From 1996 to 2004, he was a senior researcher of the Italian National Research Council in Pisa. He is Professor of Microelectronics at the University of Pisa. His research interests include design methodologies and hardware/software architectures for integrated circuits and systems. Prof. Fanucci has co-authored more than 100 scientific publications and he holds more than ten patents.  相似文献   
83.
A customized atomic force microscopy (AFM) instrument optimized for imaging protein crystals in solution is described. The device was tested on crystals and Langmuir-Blodgett (LB) films of two proteins with quite different molecular weights. This approach enables the periodicity and morphology of crystals to be studied in their mother liquid, thereby preserving the native periodic protein crystal structure, which is typically destroyed by drying. Moreover, the instrument appears to distinguish protein crystals from salt crystals, which under the optical microscope are frequently quite similar, the difference between them often being revealed only during x-ray analysis. AFM estimates of the packing, order, and morphology of the given single proteins appear quite similar in the LB thin film and in the crystals, which means that routine crystal measurements can be performed at high resolution. The AFM consists of a custom-built measuring head and a homemade flexible SPM controller which can drive the head for contact, noncontact and spectroscopy modes, thus providing the user with a high degree of customization for crystal measurement.  相似文献   
84.
Vascular catheterization is a common procedure in clinical medicine. It is normally performed by a specialist using an X-ray fluoroscopic guide and contrast-media. In the present paper, an image-guided navigation system which indicates a path providing guidance to the desired target inside the vascular tree is described with the aim of reducing the exposure of personnel and patients to X-rays during the catheterization procedure. A 3D model of the patient vascular tree, reconstructed with data collected by an angiography before starting the intervention, is used as a guide map instead of fluoroscopic scans. An accurate spatial correspondence between the body of the patient and the 3D reconstructed vascular model is established and, by means of a position indicator installed over the catheter tip, the real-time position/orientation of the tip is indicated correctly. This paper describes the system and the operational procedures necessary to use the proposed method efficiently during a catheter intervention. Preliminary experimental results on a phantom are also reported.  相似文献   
85.
Real-time scheduling for energy harvesting sensor nodes   总被引:1,自引:1,他引:0  
Energy harvesting has recently emerged as a feasible option to increase the operating time of sensor networks. If each node of the network, however, is powered by a fluctuating energy source, common power management solutions have to be reconceived. This holds in particular if real-time responsiveness of a given application has to be guaranteed. Task scheduling at the single nodes should account for the properties of the energy source, capacity of the energy storage as well as deadlines of the single tasks. We show that conventional scheduling algorithms (like e.g. EDF) are not suitable for this scenario. Based on this motivation, we have constructed optimal scheduling algorithms that jointly handle constraints from both energy and time domain. Further we present an admittance test that decides for arbitrary task sets, whether they can be scheduled without deadline violations. To this end, we introduce the concept of energy variability characterization curves (EVCC) which nicely captures the dynamics of various energy sources. Simulation results show that our algorithms allow significant reductions of the battery size compared to Earliest Deadline First scheduling.
Clemens MoserEmail:
  相似文献   
86.
87.
We analyze generalization in XCSF and introduce three improvements. We begin by showing that the types of generalizations evolved by XCSF can be influenced by the input range. To explain these results we present a theoretical analysis of the convergence of classifier weights in XCSF which highlights a broader issue. In XCSF, because of the mathematical properties of the Widrow-Hoff update, the convergence of classifier weights in a given subspace can be slow when the spread of the eigenvalues of the autocorrelation matrix associated with each classifier is large. As a major consequence, the system's accuracy pressure may act before classifier weights are adequately updated, so that XCSF may evolve piecewise constant approximations, instead of the intended, and more efficient, piecewise linear ones. We propose three different ways to update classifier weights in XCSF so as to increase the generalization capabilities of XCSF: one based on a condition-based normalization of the inputs, one based on linear least squares, and one based on the recursive version of linear least squares. Through a series of experiments we show that while all three approaches significantly improve XCSF, least squares approaches appear to be best performing and most robust. Finally we show how XCSF can be extended to include polynomial approximations.  相似文献   
88.
Recent coordination languages and models are moving towards the application of techniques coming from the research context of complex systems: adaptivity and self-organization are exploited in order to tackle the openness, dynamism and unpredictability of today's distributed systems. In this area, systems are to be described using stochastic models, and simulation is a valuable tool both for analysis and design. Accordingly, in this work we focused on modelling and simulating emergent properties of coordination techniques.We first develop a framework acting as a general-purpose engine for simulating stochastic transition systems, built as a library for the Maude term rewriting system. We then evaluate this tool to a coordination problem called collective sort, where autonomous agents move tuples across different tuple spaces according to local criteria, and resulting in the emergence of the complete clustering property.  相似文献   
89.
A low-power wireless video sensor node for distributed object detection   总被引:2,自引:0,他引:2  
In this paper we propose MicrelEye, a wireless video node for cooperative distributed video processing applications that involve image classification. The node is equipped with a low-cost VGA CMOS image sensor, a reconfigurable processing engine (FPGA, Microcontroller, SRAM) and a Bluetooth 100-m transceiver. It has a size of few cubic centimeters and its typical power consumption is approximately ten times less than that of typical commercial DSP-based solutions. As regards classification, a highly optimized hardware-oriented support vector machine-like (SVM-like) algorithm called ERSVM is proposed and implemented. We describe our hardware and software architecture, its performance and power characteristics. The case study considered in this paper is people detection. The obtained results suggest that the present technology allows for the design of simple intelligent video nodes capable of performing classification tasks locally.
Luca BeniniEmail:
  相似文献   
90.
This paper presents novel algorithmic and architectural solutions for real-time and power-efficient enhancement of images and video sequences. A programmable class of Retinex-like filters, based on the separation of the illumination and reflectance components, is proposed. The dynamic range of the input image is controlled by applying a suitable non-linear function to the illumination, while the details are enhanced by processing the reflectance. An innovative spatially recursive rational filter is used to estimate the illumination. Moreover, to improve the visual quality results of two-branch Retinex operators when applied to videos, a novel three-branch technique is proposed which exploits both spatial and temporal filtering. Real-time implementation is obtained by designing an Application Specific Instruction-set Processor (ASIP). Optimizations are addressed at algorithmic and architectural levels. The former involves arithmetic accuracy definition and linearization of non-linear operators; the latter includes customized instruction set, dedicated memory structure, adapted pipeline, bypasses, custom address generator, and special looping structures. The ASIP is synthesized in standard-cells CMOS technology and its performances are compared to known Digital signal processor (DSP) implementations of real-time Retinex filters. As a result of the comparison, the proposed algorithmic/architectural design outperforms state-of-art Retinex-like operators achieving the best trade-off between power consumption, flexibility, and visual quality.
Giovanni RamponiEmail:

Sergio Saponara   is a Research Scientist and Assistant Professor at the University of Pisa. He was born in Bari, Italy, in 1975. He received the Electronic Engineering degree cum laude and the Ph.D. in Information Engineering, both from Pisa University, in 1999 and 2003, respectively. Since 2001 he collaborates with Consorzio Pisa Ricerche, Italy and in 2002 he was with IMEC, Belgium as Marie Curie research fellow. His research and teaching interests include electronic circuits and systems for multimedia, telecom and automation. He co-authored more than 40 papers including journals, conferences and patents. Luca Fanucci   is Associate Professor of Microelectronics at the University of Pisa. He was born in Montecatini, Italy, in 1965. He received the Doctor Engineer degree and the Ph.D. in Electronic Engineering from the University of Pisa in 1992 and 1996, respectively. From 1992 to 1996, he was with the European Space Agency's Research and Technology Center, Noordwijk, The Netherlands, and from 1996 to 2004 he was a Research Scientist of the Italian National Research Council in Pisa. His research interests include design technologies for integrated circuits and systems, with emphasis on system-level design, hardware/software co-design and low-power. He co-authored more than 100 journal/conference papers and holds more than 10 patents. Stefano Marsi   was born in Trieste, Italy, in 1963. He received the Doctor Engineer degree in Electronic Engineering (summa cum laude) in 1990 and the Ph.D. degree in 1994. Since 1995 he has held the position of researcher in the Department of Electronics at the University of Trieste where he is the teacher of courses in electronic field. His research interests include non-linear operators for image and video processing and their realization through application specific electronics circuits. He is author or co-author of more than 40 papers in international journals, proceedings of international conferences or contributions in books. Giovanni Ramponi   is Professor of Electronics at the Department of Electronics of the University of Trieste, Italy. His research interests include nonlinear digital signal processing, and the enhancement and feature extraction in images and image sequences. Prof. Ramponi has been an Associate Editor of the IEEE Signal Processing Letters and of the IEEE Transactions on Image Processing; presently is an AE of the SPIE Journal of Electronic Imaging. He has participated in various EU and National Research Projects. He is the co-inventor of various pending international patents and has published more than 140 papers in international journals and conference proceedings, and as book chapters. Prof. Ramponi contributes to several undergraduate and graduate courses on digital signal processing.   相似文献   
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