Advanced Concentration Gradient Cathode Material with Two‐Slope for High‐Energy and Safe Lithium Batteries

Li[Ni_0.65Co_0.13Mn_0.22]O₂ cathode with two‐sloped full concentration gradient (TSFCG), maximizing the Ni content in the inner part of the particle and the Mn content near the particle surface, is synthesized via a specially designed batch‐type reactor. The cathode delivers a discharge capacity of 200 mAh g^?1 (4.3 V cutoff) with excellent capacity retention of 88% after 1500 cycles in a full‐cell configuration. Overall electrochemical performance of the TSFCG cathode is benchmarked against conventional cathode (CC) with same composition and commercially available Li[Ni_0.8Co_0.15Al_0.05]O₂ (NCA). The TSFCG cathode exhibits the best cycling stability, rate capability, and thermal stability of the three electrodes. Transmission electron microscopy analysis of the cycled TSFCG, CC, and NCA cathodes shows that the TSFCG electrode maintains both its mechanical and structural integrity whereas the NCA electrode nearly pulverizes due to the strain during cycling.     

Real‐Time License Plate Detection in High‐Resolution Videos Using Fastest Available Cascade Classifier and Core Patterns

We present a novel method for real‐time automatic license plate detection in high‐resolution videos. Although there have been extensive studies of license plate detection since the 1970s, the suggested approaches resulting from such studies have difficulties in processing high‐resolution imagery in real‐time. Herein, we propose a novel cascade structure, the fastest classifier available, by rejecting false positives most efficiently. Furthermore, we train the classifier using the core patterns of various types of license plates, improving both the computation load and the accuracy of license plate detection. To show its superiority, our approach is compared with other state‐of‐the‐art approaches. In addition, we collected 20,000 images including license plates from real traffic scenes for comprehensive experiments. The results show that our proposed approach significantly reduces the computational load in comparison to the other state‐of‐the‐art approaches, with comparable performance accuracy.     

A 12-b, 10-MHz, 250-mW CMOS A/D converter

A 12-b, 10-MHz, 250-mW, four-stage analog-to-digital converter (ADC) was implemented using a 0.8-μm p-well CMOS technology. The ADC based on a digitally calibrated multiplying digital-to-analog converter (MDAC) selectively employs a binary-weighted capacitor array in the front-end stage and a unit-capacitor array in the remaining back-end stages to obtain 12 b level linearity while maintaining high yield. All the analog and digital circuit functional blocks are fully integrated on a single chip, which occupies a die area of 15 mm² (4.2 mm×3.6 mm). Measured differential nonlinearity (DNL) and integral nonlinearity (INL) of the prototype are less than ±0.8 LSB and ±1.8 LSB, respectively     

A dynamic frequency grid allocation scheme for the efficient designof equiripple FIR filters

In the design of a digital filter, the frequency response is often optimized to meet a given set of specifications on a dense grid of frequency points. The density of the frequency grid points must be sufficiently high so that the frequency response of the filter does not violate the specifications at frequencies in between the grid points. However, the computational complexity of the design process and the storage requirements of the computer increase with the number of frequency grid points. We propose a novel dynamic: grid point allocation technique for the design of minimax optimum FIR filter. It uses a sparse frequency grid but will produce a design that is the same as one designed on very dense frequency grid points. It requires significantly less computer time and memory resources compared with fixed grid point algorithms     

Medical Positron Imaging with a Dense Drift Space MultiWire Proportional Chamber

A multiplanar positron camera is proposed, made of six MWPC modules, arranged to form the lateral surface of a hexagonal prism. Each 50 x 50 cm(2) module has a single MWPC sandwiched by two 2-cm thick lead glass tube converters. The experimental results for a 15 x 15 cm(2) test module are reported. For 511 keV gamma-rays incident almost perpendicular onto a 1.0-cm thick converter, a detection efficiency of 4.3%, a time resolution of 130 ns (FWHM) and a spatial resolution of 2.8 mm (FWHM) have been measured with a standard Argon-Methane (70-30) mixture at 1.2 atm. The chamber may also be operated in high resolution mode: 1.2-mm (FWHM) spatial resolution has been measured at a 50% lower efficiency. The use of fast delay lines (specific delay 8 ns/cm) for the position read-out ensures a high rate capability. The expected performance of the six-module MWPC camera is discussed and compared with that of a BGO crystal ring camera. The MWPC solution seems very attractive not only for its low cost and simplicity of construction, but also for its fully three-dimensional imaging capability.     

Yield and quality of tofu made form soybeans and soy/peanut blends

The yield and quality of tofu made from blends of soybeans and raw peanuts, partially defatted peanut flour, and defatted peanut flour were investigated. Defatted peanut flour appears to be the most compatible with soybeans for tofu making, followed by partially defatted peanut flour and raw peanuts. Raw peanuts could be incorporated at levels of 10% while partially defatted or defatted peanut flour could be incorporated at a level of 20%: higher levels produced tofu with either poor texture or low yield. SEM images of tofu made from 100% soybeans showed a uniform, continuous, three-dimensional honeycomb-like protein network structure. When 10% of the soybeans was replaced by either raw peanuts; partially defatted peanut flour; or defatted peanut flour, the protein strands that make up the network structure were thicker than those of 100% soybean tofu. When soybeans were replaced with either of the three peanut products at a 30% level, the protein strands of the network structure were either less continuous or appeared perforated.     

Turbo multiuser detection for differentially modulated CDMA

In this letter, we study differentially modulated, iteratively decoded CDMA. The iterative multiuser receiver proposed consists of an additional soft-input soft-output (SISO) differential decoder, when compared to turbo multiuser detectors for absolutely modulated systems. Algorithms for iterative decoding with and without phase information at the receiver are developed. The resulting turbo receivers with differential modulation outperform coherent receivers with absolute modulation at moderate to high signal to noise ratios due to the interleaver gain associated with recursive inner encoders in serially concatenated encoding structures.     

Hybrid ring coupler for W-band MMIC applications using MEMS technology

The hybrid ring coupler was designed and fabricated on a GaAs substrate using surface micromachining techniques, which adopted dielectric-supported air-gapped microstrip line (DAML) structure. The fabrication process of DAML is compatible with the standard monolithic microwave integrated circuit (MMIC) techniques, and the hybrid ring coupler can be simply integrated into a plane-structural MMIC. The fabricated hybrid ring coupler shows wideband characteristics of the coupling loss of 3.57 /spl plusmn/ 0.22dB and the transmission loss of 3.80 /spl plusmn/ 0.08dB across the measured frequency range of 85 to 105GHz. The isolation characteristics and output phase differences are -34dB and 180/spl plusmn/1/spl deg/, at 94GHz, respectively.     

Single-Chip Eye Tracker Using Smart CMOS Image Sensor Pixels

The eye tracker is a system that detects the point where the user gazes on. The conventional eye tracker using a Charge-Coupled Device (CCD) camera needs many peripherals and software computation causing high cost, computation time and power consumption. This paper proposes a single-chip eye tracker using smart CMOS Image Sensor (CIS) pixels. The proposed eye tracker does not require additional peripherals and operates at higher speed than the conventional approach. The prototype chip was designed and fabricated for a 32 × 32 smart CIS pixels array with a 0.35-μ m CMOS process. The test results show ± 1 pixel error at the rate of 125 frame-per-second. The power consumption is 260 mW with 3.3 V supply voltage and the silicon area is 3.8 mm²     

Adaptive Kernel Function of SVM for Improving Speech/Music Classification of 3GPP2 SMV

Because a wide variety of multimedia services are provided through personal wireless communication devices, the demand for efficient bandwidth utilization becomes stronger. This demand naturally results in the introduction of the variable bitrate speech coding concept. One exemplary work is the selectable mode vocoder (SMV) that supports speech/music classification. However, because it has severe limitations in its classification performance, a couple of works to improve speech/music classification by introducing support vector machines (SVMs) have been proposed. While these approaches significantly improved classification accuracy, they did not consider correlations commonly found in speech and music frames. In this paper, we propose a novel and orthogonal approach to improve the speech/music classification of SMV codec by adaptively tuning SVMs based on interframe correlations. According to the experimental results, the proposed algorithm yields improved results in classifying speech and music within the SMV framework.