浅析新形式下开设电子设计实验公共选修课

为适应高校实验教学改革的要求,我们面向全校开设了“电子设计实验”公共选修课,此举在全校同学中引起了强烈反响。作为实验教学的一种尝试。本文仅对在我校开设电子设计公共选修课的意义和实验方法等进行了探讨。     

铝合金的大功率扩散型CO2激光粉末焊接技术

本试验研究采用２６００Ｗ扩散型（Ｓｌａｂ）ＣＯ２激光加工系统,利用喷射填充粉末激光焊接技术成功地进行了铝合金焊接;确定了试验材料激光焊接的能量阈值;通过工艺参数的优选获得了无明显焊接缺陷、正反两表面平滑连续的焊缝;焊接接头的力学性能检测表明,ＡＡ６０１６铝合金（厚度为１．１５ｍｍ）焊接接头抗拉强度不低于母材的可允许间隙可达０．５ｍｍ（母材厚度物４４％）;根据试验结果,推荐对于一定板厚的铝合金,应该     

H.263甚低码率视频编码标准的码率控制方法

主要提出ＩＴＵ组织的Ｈ．２６３甚低码率视频压缩编码标准输出码率的控制方案。着重分析了一种通过调整宏观量化器的量化参数来控制Ｈ．２６３编码器输出码率的方法,它能满足在ＰＳＴＮ网上低时延中的码率输出要求。     

激光激发瑞利波测量铝合金焊接残余应力

根据声弹性原理提出了一种新的测量材料表面焊接应力的激光超声方法.利用Nd:YAG脉冲激光在材料表面激发高频率超声瑞利波,采用非线性激光干涉仪对检测焊接应力的超声瑞利波进行探测.探测点的位置保持不变,通过激发源的扫描来改变激发源和探测点之间的距离,干涉仪探测到一系列超声脉冲波形信号.采用波形相关技术计算相邻超声瑞利波的传播时间延迟,得出瑞利波的传播速度,进而根据声弹性理论计算出相应的应力值.通过激光源在焊缝附近的扫描,得到焊缝周围的应力分布.测量了铝焊接平板表面的残余应力,得到了样品表面的焊接应力分布.实验结果表明,这种方法可以实现样品表面焊接应力的快速扫描测量,使其在材料表面焊接应力分布无损检测领域具有一定的应用价值.     

基于PVDF薄膜材料的脉搏传感器的研制

介绍了一种基于PVDF压电薄膜材料研制而成的脉搏传感器。该脉搏传感器从手腕处获取微弱的脉搏信号,前端采用鼓式振动结构,最大的获取信号,提高灵敏度;后经电荷放大、滤波等信号处理电路从而实现了脉搏模拟信号和脉冲方波信号的输出。     

基于线阵CCD的线路方向测量系统的开发

该系统硬件设备采用长距离准直激光光源、CCD图像传感器、旋转编码器、系统终端PC等器件,利用线阵CCD测量技术、数据处理技术、多信息传感融合技术等高新技术,能够对铁路路轨区段(长度≤200m)轨道几何形状进行高精度检测,将线路轨向测量结果直接数字化显示,为线路设备维修提供可靠的测量数据,解决了既有方法测量精度差、效率低的问题,能满足铁路工务系统作业要求、提高作业质量。     

无线一键通技术及其发展展望

本文概要描述了被认为是新的移动业务增长点的无线一键通技术的发展背景及关键技术,指出了目前无线一键通技术继续发展所面临的技术难点,并对未来业务的发展做出了展望.     

一种指数增益控制型高线性CMOS中频可变增益放大器

采用跨导线性化技术设计了一种具有指数增益特性的高线性中频可变增益放大器.该放大器由电流调节型可变增益单元、宽范围指数电压转换电路及固定增益放大器构成.基于0.25μm CMOS工艺的测试结果表明,放大器实现了8～48dB的增益连续变化,差分输出1V峰峰值下的三阶互调失真小于-60dBc,最大增益处噪声系数为8.7dB,50Ω负载下三阶输出截点为14.2dBm.     

Interference coordination method based on graph theory in two-tier cellular networks

This paper studies an interference coordination method by means of spectrum allocation in Long-Term Evolution (LTE) multi-cell scenario that comprises of macrocells and femtocells. The purpose is to maximize the total throughput of femtocells while ensuring the Signal-to-Interference plus Noise Ratio (SINR) of the edge macro mobile stations (mMSs) and the edge femtocell Mobile Stations (fMSs). A new spectrum allocation algorithm based on graph theory is proposed to reduce the interference. Firstly, the ratio of Resource Blocks (RBs) that mMSs occupy is obtained by genetic algorithm. Then, after considering the impact of the macro Base Stations (mBSs) and small scale fading to the fMS on different RBs, multi-interference graphs are established and the spectrum is allocated dynamically. The simulation results show that the proposed algorithm can meet the Quality of Service (QoS) requirements of the mMSs. It can strike a balance between the edge fMSs’ throughput and the whole fMSs’ throughput.     

A direct digital frequency synthesizer with fourth-order phase domain /spl Delta//spl Sigma/ noise shaper and 12-bit current-steering DAC

This paper presents a direct digital frequency synthesizer (DDFS) with a 16-bit accumulator, a fourth-order phase domain single-stage /spl Delta//spl Sigma/ interpolator, and a 300-MS/s 12-bit current-steering DAC based on the Q/sup 2/ Random Walk switching scheme. The /spl Delta//spl Sigma/ interpolator is used to reduce the phase truncation error and the ROM size. The implemented fourth-order single-stage /spl Delta//spl Sigma/ noise shaper reduces the effective phase bits by four and reduces the ROM size by 16 times. The DDFS prototype is fabricated in a 0.35-/spl mu/m CMOS technology with active area of 1.11mm/sup 2/ including a 12-bit DAC. The measured DDFS spurious-free dynamic range (SFDR) is greater than 78 dB using a reduced ROM with 8-bit phase, 12-bit amplitude resolution and a size of 0.09 mm/sup 2/. The total power consumption of the DDFS is 200mW with a 3.3-V power supply.