Silicon-to-steel bonding using rapid thermal annealing

This paper presents the rapid, low-temperature bonding between silicon and steel using the rapid thermal annealing process. Three different thin-film adhesion layer systems including silver, gold, and nickel were utilized as the intermediate bonding material to assist the eutectic Pb/Sn bonding between silicon and steel. The bonding temperature was set at 220/spl deg/C for 20 s, with a 20-s ramp-up time. Five experiments were conducted to determine the strength of the bond, including static tensile and compressive four-point bend tests, axial extension tests, tensile bending fatigue tests, and corrosion resistance tests. The test results have shown that the gold adhesion layer is the most robust, demonstrating minimal creep during fatigue tests, no delamination during the tensile or compressive four-point bend tests, and acceptable strength during the axial extension tests. Additionally, all adhesion layers have withstood four months of submersion in various high-temperature solutions and lubricants without failure. Simulations of the axial stresses and strains that developed during the four-point bend and axial extension tests were performed and showed that the presence of the silicon die provides a local reinforcement of the bond as observed in the experimental tests.     

Enhancing echo cancellation via estimation of delay

The advent of packetized audio transmission, such as voice over IP (VoIP), has resulted in challenging requirements for echo cancellation technology. One key aspect of this technology is the need to characterize, quickly and accurately, the echo paths in the transmission media. Echo paths consist of a constant time delay with no echo signal and active regions in which the echo signal is present. When an adaptive filter echo cancellation algorithm is used, its performance can be greatly increased, and its complexity can be reduced if it is only applied to the active regions. This requires an algorithm to estimate the constant delay and locate the active regions. Traditionally, delay estimation has been based on direct application of cross-correlation. This method has poor performance because the input signals are highly correlated and has a high implementation cost because many cross-correlation lags have to be computed for longer time delays. The delay estimation addressed in this paper has two major advantages over the traditional methods. The first is that it has improved performance because the input signals are processed to have less correlation. The second is that the implementation cost is significantly reduced because fewer cross-correlation lags are computed, and an efficient method to estimate lags is created.     

Auditory motivated level-crossing approach to instantaneous frequency estimation

We address the problem of estimating the instantaneous frequency (IF) of a phase signal using its level-crossing (LC) information based on front-end auditory processing motivation. We show that the problem of IF estimation using LC information can be cast in the framework of estimation from irregularly sampled data. The formulation has the generality of estimating different types of IF without the need for a quasistationary assumption. We consider two types of IF-polynomial and bandlimited; we use polynomial interpolating functions for the former, and for the latter, we propose a novel "line plus sum of sines" model. The model parameters are estimated by linear regression. Considering the noisy case, LC data for different levels is analyzed, and methods for combining different estimators from LCs are discussed. Theoretical and extensive simulation results show that the performance of the zero-crossing (ZC) based IF estimator and the level-crossing based IF estimator with smaller level values is better than those obtained with higher level values or their combinations. The new technique reaches the Crame/spl acute/r-Rao bound (CRB) roughly above 4 dB signal-to-noise ratio (SNR), and its performance does not deteriorate rapidly with mismatch in the IF order compared with the other techniques in the literature.     

Managing logical channel configurations in complex satellite architectures

As a result of the increased switching complexity of many communications satellites, often transponders are available with a variety of configuration options offering flexibility in power, bandwidth, and coverage. Many of these configurations share resources that prevent them from being simultaneously active, making it a challenge to understand and manage the satellite capacity inventory. In this paper we define the logical channel configuration (LCC) as an unambiguous unit of the inventory and present a novel method of modelling the interdependencies between these LCCs using linear algebra. In particular, a projector matrix is defined which can be used to update the activation state of all LCCs when the state of one or more of these is changed. As a result, a number of valid LCC scenarios can be easily generated and evaluated for optimal use of the satellite resources. Copyright © 2005 John Wiley & Sons, Ltd.     

Entities,identities, identifiers and credentials — what does it all mean?

This paper looks at the concepts of entities, identities, identifiers and credentials, their definitions, and how they combine to authenticate an identity to an account, or function, within a service. Credentials can be divided into several different types on the basis of their use, origin and characteristics. In particular, types such as composite, dynamic and derived credentials will be considered, and their applicability within an identity management system. Each credential must be managed through its entire life cycle from initial registration, general use and suspension, to deletion. The notion of public (i.e. freely distributable) and private (i.e. known only to you) aspects of a credential is explored. The bindings, by trusted third parties, of identifiers and public credentials into permits and instruments of proof is explained along with the convenience, but greater exposure, of local information. Several scenarios are analysed in terms of how different types of credentials are employed during the authentication process.     

Efficient reconfigurable techniques for VLSI arrays with 6-port switches

This paper proposes an efficient techniques to reconfigure a two-dimensional degradable very large scale integration/wafer scale integration (VLSI/WSI) array under the row and column routing constraints, which has been shown to be NP-complete. The proposed VLSI/WSI array consists of identical processing elements such as processors or memory cells embedded in a 6-port switch lattice in the form of a rectangular grid. It has been shown that the proposed VLSI structure with 6-port switches eliminates the need to incorporate internal bypass within processing elements and leads to notable increase in the harvest when compared with the one using 4-port switches. A new greedy rerouting algorithm and compensation approaches are also proposed to maximize harvest through reconfiguration. Experimental results show that the proposed VLSI array with 6-port switches consistently outperforms the most efficient alternative proposed in literature, toward maximizing the harvest in the presence of fault processing elements.     

iShopFloor: an Internet-enabled agent-based intelligent shop floor

Global competition is driving manufacturing companies to change the way they do business. New kinds of shop floor control systems need to be implemented for these companies to respond quickly to changing shop floor environments and customer demands. This paper presents a new concept called iShopFloor-an intelligent shop floor based on the Internet, web, and agent technologies. It focuses on the implementation of distributed intelligence in the manufacturing shop floor. The proposed approach provides the framework for components of a complex control system to work together as a whole rather than as a disjoint set. It encompasses both information architecture and integration methodologies. The paper introduces the basic concept of iShopFloor, a generic system architecture, and system components. It also describes the implementation of eXtensible Markup Language message services in iShopFloor and the application of intelligent agents to distributed manufacturing scheduling. A prototype environment is presented, and some implementation issues are discussed.     

Peak-to-average power reduction in space division multiplexing based OFDM systems through spatial shifting

A new method to reduce the peak-to-average power ratio (PAPR) in space division multiplexing systems applying orthogonal frequency division multiplexing is proposed. The method applies spatial shifting to partial transmit sequences to achieve a decreased PAPR on all transmit branches.     

An integrated system to remote monitor and control anaerobic wastewater treatment plants through the internet.

The TELEMAC project brings new methodologies from the Information and Science Technologies field to the world of water treatment. TELEMAC offers an advanced remote management system which adapts to most of the anaerobic wastewater treatment plants that do not benefit from a local expert in wastewater treatment. The TELEMAC system takes advantage of new sensors to better monitor the process dynamics and to run automatic controllers that stabilise the treatment plant, meet the depollution requirements and provide a biogas quality suitable for cogeneration. If the automatic system detects a failure which cannot be solved automatically or locally by a technician, then an expert from the TELEMAC Control Centre is contacted via the internet and manages the problem.     

An on-chip active decoupling circuit to suppress crosstalk in deep-submicron CMOS mixed-signal SoCs

A decoupling circuit using an operational amplifier is proposed to suppress substrate crosstalk in mixed-signal system-on-chip (SoC) devices. It overcomes the parasitic inductance problem of on-chip capacitor decoupling. The effect of the proposed decoupling circuit is not limited by parasitic fine impedance. A 0.13-/spl mu/m CMOS test chip showed that substrate noise at frequencies from 40 MHz to 1 GHz was incrementally suppressed by sequentially activating three of the proposed circuits in parallel. The power dissipation of each circuit was 3.3 mW at a 1.0-V power supply. The test chip measurement showed that the proposed decoupling reduced crosstalk by 31% at 200 MHz, whereas it was reduced by 4.4% with capacitor decoupling. This 7:1 ratio, or 17 dB, corresponds to the gain of the opamp. Design of the opamp and its feedback loop for active decoupling is simple, making the opamp useful for SoC applications.